MCC501RX200TD0B Freescale Semiconductor, MCC501RX200TD0B Datasheet - Page 23

• Manufacturer Part Number: MCC501RX200TD0B
• Manufacturer: Freescale Semiconductor

Specifications of MCC501RX200TD0B

• Package Type: BGA
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Fabric Processor
System Interfaces
•
•
The system interfaces to the XP are:
•
•
•
The Fabric Processor (FP) acts as a high-speed network interface port with advanced
functionality. It allows the C-5 NP to interface to an application-specific switching solution
internal to your design. The FP port supports the bidirectional transfer of packets, frames,
Management of a host interface through the PCI
Management of system interfaces (PCI, Serial Bus, PROM)
PCI — Provides an industry standard 32bit 33/66MHz PCI channel used for chip-level
shared resources. The PCI has both initiator and target capabilities. The PCI interface is
typically connected to a host processor.
Serial Bus Interface — Provides a general purpose bi-directional, two-wire serial bus
and I/O port that allows the C-5 NP to control external logic with either of two
standard protocols:
– The MDIO (high-speed) protocol: uses a 16bit data format with 10bits of
– The low-speed protocol: uses an 8bit data format followed by an acknowledge bit
Software is used to select which protocol to use, by setting the appropriate bits in the
Serial Bus Configuration Register. When a serial bus transfer is active, an external pin is
driven by the C-5 NP to indicate which protocol is being used (SPLD=0 indicates MDIO
protocol; SPLD=1 indicates low-speed protocol).
Both SIDA and SICL are bi-directional lines that are connected, via an external pull-up
resistor, to a positive supply voltage. When the bus is free, both lines are HIGH because
of the pull-up resistor. The output stages of the devices connected to the bus must
have either an open-drain or open-collector in order to perform the wired-AND
function required for its arbitration mechanism.
PROM Interface — Allows the XP to boot from nonvolatile, flash memory. The PROM
interface is a low-speed, serial I/O port that runs at
maximum PROM size is 8MBytes, and a 16bit wide configuration is required. External
board logic is required to perform serial-to-parallel conversion for PROM address
outputs and parallel-to-serial conversion for PROM data inputs.
addressing and supports transfers up to 25MHz.
and supports transfers up to 400kbps.
1
/
2
to
1
/
16
the core clock rate. The
Fabric Processor
V 04
23