LAN9118MT Standard Microsystems (SMSC), LAN9118MT Datasheet - Page 98

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LAN9118MT

Manufacturer Part Number
LAN9118MT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

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High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Conversely, as data is received by the LAN9118, it is moved from the MAC to the RX MIL FIFO, and
then into the RX data FIFO. When the RX data FIFO fills up, data will continue to collect in the RX
MIL FIFO. If the RX MIL FIFO fills up and overruns, subsequent RX frames will be lost until room is
made in the RX data FIFO. For each frame of data that is lost, the RX Dropped Frames Counter
(RX_DROP) is incremented.
RX and TX MIL FIFO levels are not visible to the host processor. RX and TX MIL FIFOs operate
independent of the TX adatand RX data and status FIFOs. FIFO levels set for the RX and TX data
and Status FIFOs do not take into consideration the MIL FIFOs.
Revision 1.0 (03-17-05)
98
SMSC LAN9118
DATASHEET

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