CY7C65113-SC Cypress Semiconductor Corp, CY7C65113-SC Datasheet - Page 32

no-image

CY7C65113-SC

Manufacturer Part Number
CY7C65113-SC
Description
IC MCU 8K USB HUB 4 PORT 28-SOIC
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CY7C65113-SC

Applications
USB Hub/Microcontroller
Core Processor
M8
Program Memory Type
OTP (8 kB)
Controller Series
USB Hub
Ram Size
256 x 8
Interface
I²C, USB
Number Of I /o
11
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
SOIC
Mounting
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1331

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C65113-SC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Bit [0..6] : Port x Speed (where x = 1..7).
Bit 7 : Reserved.
The Hub Ports Speed register is cleared to zero by reset or bus reset. This must be set by the firmware on issuing a port reset.
The Reserved bit [7] should always read as ‘0.’
16.2
After a USB device connection has been detected, firmware must update status change bits in the hub status change data
structure that is polled periodically by the USB host. The host responds by sending a packet that instructs the hub to reset and
enable the downstream port. Firmware then sets the bit in the Hub Ports Enable register (Figure 16-3), for the downstream port.
The hub repeater hardware responds to an enable bit in the Hub Ports Enable register (Figure 16-3) by enabling the downstream
port, so that USB traffic can flow to and from that port.
If a port is marked enabled and is not suspended, it receives all USB traffic from the upstream port, and USB traffic from the
downstream port is passed to the upstream port (unless babble is detected). Low-speed ports do not receive full-speed traffic
from the upstream port.
When firmware writes to the Hub Ports Enable register (Figure 16-3) to enable a port, the port is not enabled until the end of any
packet currently being transmitted. If there is no USB traffic, the port is enabled immediately.
When a USB device disconnection has been detected, firmware must update status bits in the hub change status data structure
that is polled periodically by the USB host. In suspended mode, a connect or disconnect event generates an interrupt (if the hub
interrupt is enabled) even if the port is disabled
.
Bit [0..6] : Port x Enable (where x = 1..7)
Bit 7 : Reserved.
The Hub Ports Enable register is cleared to zero by reset or bus reset to disable all downstream ports as the default condition.
A port is also disabled by internal hub hardware (enable bit cleared) if babble is detected on that downstream port. Babble is
defined as:
16.3
Data transfer on hub downstream ports is controlled according to the bit settings of the Hub Downstream Ports Control Register
(Figure 16-4). Each downstream port is controlled by two bits, as defined in Table 16-1 below. The Hub Downstream Ports Control
Register is cleared upon reset or bus reset, and the reset state is the state for normal USB traffic. Any downstream port being
forced must be marked as disabled (Figure 16-3) for proper operation of the hub repeater.
Firmware should use this register for driving bus reset and resume signaling to downstream ports. Controlling the port pins through
this register uses standard USB edge rate control according to the speed of the port, set in the Hub Port Speed Register.
The downstream USB ports are designed for connection of USB devices, but can also serve as output ports under firmware
control. This allows unused USB ports to be used for functions such as driving LEDs or providing additional input signals. Pulling
up these pins to voltages above V
This register is not reset by USB bus reset. These bits must be cleared before going into suspend.
Document #: 38-08002 Rev. *B
Hub Ports Enable Register
Bit #
Bit Name
Read/Write
Reset
• Any non-idle downstream traffic on an enabled downstream port at EOF2.
• Any downstream port with upstream connectivity established at EOF2 (i.e., no EOP received by EOF2).
Set to 1 if the device plugged in to Port x is Low Speed; Set to 0 if the device plugged in to Port x is Full Speed.
Set to 0.
Set to 1 if Port x is enabled; Set to 0 if Port x is disabled
Set to 0.
Enabling/Disabling a USB Device
Hub Downstream Ports Status and Control
Reserved
R/W
7
0
Enable
Port 7
R/W
REF
6
0
may cause current flow into the pin.
Figure 16-3. Hub Ports Enable Register
Enable
Port 6
R/W
5
0
Enable
Port 5
R/W
4
0
Enable
Port 4
R/W
3
0
Enable
Port 3
R/W
2
0
Enable
Port 2
R/W
1
0
CY7C65013
CY7C65113
Address 0x49
Page 32 of 51
Enable
Port 1
R/W
0
0

Related parts for CY7C65113-SC