CY7C67300-100AXE Cypress Semiconductor Corp, CY7C67300-100AXE Datasheet - Page 27

• Manufacturer Part Number: CY7C67300-100AXE
• Description: IC USB HOST/PERIPH CNTRL 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r

Specifications of CY7C67300-100AXE

• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timer n Register [R/W]
■
■
Table 42. Timer n Register
Register Description
The Timer n Register sets the Timer n count. Both Timer 0 and
Timer 1 decrement by one every 1 µs clock tick. Each can
provide an interrupt to the CPU when the timer reaches zero.
Count (Bits [15:0])
The Count field sets the Timer count.
General USB Registers
There is one set of registers dedicated to general USB control.
This set consists of two identical registers: one for Host/Device
Port 1 and one for Host/Device Port 2. This register set has
USB n Control Register [R/W]
■
■
Table 44. USB n Control Register
Register Description
The USB n Control register is used in both host and device mode.
It monitors and controls the SIE and the data lines of the USB
ports. This register can be accessed by the HPI interface.
Document #: 38-08015 Rev. *J
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Timer 0 Register 0xC010
Timer 1 Register 0xC012
USB 1 Control Register 0xC08A
USB 2 Control Register 0xC0AA
Resistors
Enable
Port B
Status
Port A
R/W
R/W
R/W
D+
15
15
R
X
1
7
1
7
0
Port B
Status
R/W
R/W
R/W
14
D–
14
R
X
1
6
1
6
0
Force D±
Port B
State
Port A
Status
R/W
R/W
R/W
13
D+
13
R
1
5
1
X
5
0
Port A
Status
R/W
R/W
R/W
12
D–
12
R
1
4
1
X
4
0
Force D±
Count...
...Count
Port A
functions for both USB host and USB peripheral options and is
covered in this section and summarized in
only registers are covered in
device only registers are covered in
on page
Table 43. General USB Registers
Port B D+ Status (Bit 15)
The Port B D+ Status bit is a read only bit that indicates the value
of DATA+ on Port B.
1: D+ is HIGH
0: D+ is LOW
State
USB n Control Register 0xC08A/0xC0AA
Register Name
R/W
R/W
R/W
LOB
R/W
11
11
23.
3
1
1
0
3
0
Suspend
Enable
R/W
R/W
R/W
LOA
R/W
10
10
2
1
1
2
0
0
Address (SIE1/SIE2)
UART Interface on page
SOF/EOP
Enable
Port B
Select
Mode
R/W
R/W
R/W
R/W
External Memory Registers
1
1
9
1
1
0
9
0
Table
CY7C67300
SOF/EOP
Resistors
Enable
Enable
Port A
Port B
Page 27 of 99
43. USB Host
R/W
R/W
R/W
R/W
0
1
8
1
0
0
8
0
7, and USB
R/W
R/W
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