CY7C67300-100AXE Cypress Semiconductor Corp, CY7C67300-100AXE Datasheet - Page 55

• Manufacturer Part Number: CY7C67300-100AXE
• Description: IC USB HOST/PERIPH CNTRL 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r

Specifications of CY7C67300-100AXE

• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IDE PIO Port Registers [0xC050 - 0xC06F] [R/W]
All IDE PIO Port registers [0xC050 - 0xC06F] in
Packet Interface Extension (ATA/ATAPI-4) Specification, T13/1153D Rev 18. The table Address column denotes the CY7C67300
register address for the corresponding ATA/ATAPI register. The IDE_nCS[1:0] field defines the ATA interface CS addressing bits and
the IDE_A[2:0] field define the ATA interface address bits. The combination of IDE_nCS and IDE_A are the ATA interface register
address.
Table 88. IDE PIO Port Registers
HSS Registers
There are eight registers dedicated to HSS operation. Each of these registers are covered in this section and summarized in
Table 89. HSS Registers
Document #: 38-08015 Rev. *J
HSS Control Register
HSS Baud Rate Register
HSS Transmit Gap Register
HSS Data Register
HSS Receive Address Register
HSS Receive Length Register
HSS Transmit Address Register
HSS Transmit Length Register
Address
0xC05A
0xC05C
0xC05E
0xC06A
0xC06C
0xC06E
0xC050
0xC052
0xC054
0xC056
0xC058
0xC060
0xC062
0xC064
0xC066
0xC068
Read: Alternate Status Register
Write: Device Control Register
Write: Command Register
Sector Number Register
Register Name
Write: Feature Register
Cylinder High Register
Sector Count Register
Cylinder Low Register
Device/Head Register
Read: Status Register
ATA/ATAPI Register
Read: Error Register
DATA Register
Not Defined
Not Defined
Not Defined
Not Defined
Not Defined
Not Defined
Not Defined
Table 88
are defined in detail in the Information Technology-AT Attachment -4 with
IDE_nCS[1:0]
0xC070
0xC072
0xC074
0xC076
0xC078
0xC07A
0xC07C
0xC07E
‘10’
‘10’
‘10’
‘10’
‘10’
‘10’
‘10’
‘10’
‘01’
‘01’
‘01’
‘01’
‘01’
‘01’
‘01’
‘01’
Address
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IDE_A[2:0]
‘000’
‘001’
‘010’
‘011’
‘100’
‘101’
‘110’
‘000’
‘001’
‘010’
‘011’
‘100’
‘101’
‘110’
‘111’
‘111’
CY7C67300
R/W
Page 55 of 99
Table
89.
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