MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 116

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Document Revision History
23 Document Revision History
Table 76
116
Revision
5
4
3
2
1
0
provides a revision history for the MPC8544E hardware specification.
01/2011
09/2010
11/2009
01/2009
06/2008
04/2008
Date
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Update in
Improvement to
Update
Update in
Initial release.
• Updated
• Modified local bus information in
• Added footnote 28 to
• Updated solder-ball parameter in
• Update
• Update
• Update power number table to include 1067 MHz/533 MHz power numbers.
• Remove Part number tables from Hardware spec. The part numbers are available on Freescale
• Removed I/O power numbers from the Hardware spec. and added the table to bring-up guide
• Update t
• Updated RX_CLK duty cycle min, and max value to meet the industry standard GMII duty cycle.
• Update paragraph
• Update
• In
• Update
as 133 MHz.
web site product page.
application note.
Table
Table 76. MPC8544E Document Revision History
Figure 59
Table 18
Table 48
Section 20.3.4, “Temperature Diode,”
Table 61 Package Parameters from 95.5%sn to 96.5%sn
Figure 5 DDR Output Timing Diagram.
Section 22, “Device Nomenclature,”
DDKHMP,
40, removed note 1 and renumbered remaining note.
Table
Section 16, “High-Speed Serial Interfaces (HSSI)
75.
Mechanical Dimensions
DDR SDRAM Output AC Timing Specifications tMCK Max value
Local Bus General Timing Parameters—PLL Bypassed
t
DDKHME
Section 21.3, “Decoupling Recommendations.”
Table
in
62.
Table 18.
Section 1.1, “Key Features,”
Table
Substantive Change(s)
61.
with regards to Commercial Tier.
to show max local bus frequency
Freescale Semiconductor