MC68306FC16B Freescale Semiconductor, MC68306FC16B Datasheet - Page 27

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MC68306FC16B

Manufacturer Part Number
MC68306FC16B
Description
IC MPU INTEGRATED 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68306FC16B

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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Quantity
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Part Number:
MC68306FC16B
Manufacturer:
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MC68306FC16B
Manufacturer:
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BGACK can be negated (pulled high), and the MC68306 will operate in a two-wire bus
arbitration system.
2.1.7 Data Bus (D15–D0)
This bi-directional, three-state bus is the general-purpose data path. It is 16 bits wide and
can transfer and accept data of either word or byte length. During an interrupt
acknowledge cycle, an external device can supply the interrupt vector number on data
lines D7–D0.
2.1.8 Data Transfer Acknowledge (
Assertion of this bi-directional, open-drain signal indicates the completion of the data
transfer. When the processor recognizes DTACK during a read cycle, data is latched, and
the bus cycle is terminated. When DTACK is recognized during a write cycle, the bus
cycle is terminated. The MC68306 generates DTACK for all internal cycles, DRAM cycles,
and autovector IACK cycles, and can be programmed to generate DTACK for any chip
select cycle. (Refer to 3.7 Asynchronous Operation and 3.8 Synchronous Operation.)
2.1.9 DRAM Multiplexed Address Bus (DRAMA14–DRAMA0)
These signals provide fifteen multiplexed address bits used during row address strobe.
2.1.10 Processor Function Codes (FC2–FC0)
These function code outputs indicate the mode (user or supervisor) and the address
space type currently being accessed, as shown in Table 2-8. The function code outputs
are valid whenever AS is asserted.
2.1.11 Halt (
External assertion of this bi-directional signal causes the processor to stop bus activity at
the completion of the bus cycle for which the input met set-up time requirements (i.e.,
current or next cycle). This operation places all control signals in the inactive state. For
MOTOROLA
HALT
)
Freescale Semiconductor, Inc.
High
High
High
High
FC2
Low
Low
Low
Low
Function Code Output
For More Information On This Product,
Table 2-8. Function Code Outputs
High
High
High
High
FC1
Low
Low
Low
Low
MC68306 USER'S MANUAL
Go to: www.freescale.com
High
High
High
High
FC0
Low
Low
Low
Low
DTACK
(Undefined, Reserved)
(Undefined, Reserved)
(Undefined, Reserved)
Address Space Type
Supervisor Program
Supervisor Data
User Program
)
CPU Space
User Data
2- 7

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