MC68MH360EM33L Freescale Semiconductor, MC68MH360EM33L Datasheet - Page 443

• Manufacturer Part Number: MC68MH360EM33L
• Description: IC MPU QUICC ETHER 33MHZ 240FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360EM33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

ENR—Enable Receive
MOTOROLA
nored. Data can be programmed to appear on the TXD pin, or the TXD pin can remain
high by programming the port A register. The RTS line can also be programmed to be dis-
abled in the appropriate parallel I/O register. In TDM modes, the L1TXDx and L1RQx lines
can be programmed to be either asserted normally or to remain inactive by programming
the serial interface mode register (SIMODE).
When using local loopback mode, the clock source for the transmitter and the receiver
must be the same. Thus, the same baud rate generator may be used for both transmitter
and receiver, or the same external CLKx pin may be used for both transmitter or receiver.
(Separate CLKx pins may be used with the transmitter and receiver as long as the CLKx
pins are connected to the same external clock signal source.)
In automatic echo mode, the channel automatically retransmits the received data on a bit-
by-bit basis using whatever receive clock is provided. The receiver operates normally and
can receive data if CD is asserted. The transmitter simply transmits received data. In this
mode, the CTS line is ignored.
The echo function may also be accomplished in software by receiving buffers from an
SCC, linking them to Tx BDs and then transmitting them back out of that SCC.
In loopback/echo mode, loopback operation and echo operation occur simultaneously.
The CD pin and CTS pins are ignored. See the loopback bit description for clocking re-
quirements.
This bit enables the receiver hardware state machine for this SCC. When ENR is cleared,
the receiver is disabled, and any data in the receive FIFO is lost. If ENR is cleared during
reception, the receiver aborts the current character. ENR may be set or cleared regard-
01 =Local loopback mode
10 = Automatic echo mode
11 = Loopback and echo mode
If external loopback is desired, the DIAG bits should be selected
for normal operation, and an external connection should be
made between the TXD and RXD pins. Clocks may be generat-
ed internally by a baud rate generator or generated externally.
The user may physically connect the appropriate control signals
(RTS connected to CD, and CTS grounded) or the port C regis-
ter may be used to cause the CD and CTS pins to be permanent-
ly asserted to the SCC.
Users familiar with the MC68302 may notice that the QUICC
does not contain "software operation" mode. The software oper-
ation mode as implemented on the MC68302 can be implement-
ed on the QUICC using parallel I/O port C.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
NOTE
Serial Communication Controllers (SCCs)
7-119