DP83257VF National Semiconductor, DP83257VF Datasheet - Page 4

• Manufacturer Part Number: DP83257VF
• Description: IC FDDI LAYER CTRLR 160PQFP
• Manufacturer: National Semiconductor

Specifications of DP83257VF

• Controller Type: physical layer controller
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-BFQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Interface: -
• Other names: *DP83257VF

DP83222 CYCLONE Twisted Pair
FDDI Stream Cipher Device
General Description
The DP83222 CYCLONE Stream Cipher Scrambler Des-
crambler Device is an integrated circuit designed to inter-
face directly with the serial bit streams of a Twisted Pair
FDDI PMD The DP83222 is designed to be fully compatible
with the National Semiconductor FDDI Chip Sets including
twisted pair FDDI Transceivers such as the DP83223A
Twisted Pair Transceiver (TWISTER) The DP83222 re-
quires a 125 MHz Transmit Clock and corresponding Re-
ceive Clock for synchronous data scrambling and descram-
bling The DP83222 is compliant with the ANSI X3T9 5
TP-PMD standard and is required for the reduction of EMI
emission over unshielded media The DP83222 is specified
to work in conjunction with existing twisted pair transceiver
signalling schemes and enables high bandwidth transmis-
sion over Twisted Pair copper media
Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Enables 100 Mbps FDDI signalling over Category 5
Unshielded Twisted Pair (UTP) cable and Type 1
Shielded Twisted Pair (STP)
Reduces EMI emissions over Twisted Pair media
Compatible with ANSI X3T9 5 TP-PMD standard
Requires a single
Transparent mode of operation
Flexible NRZ and NRZI format options
Advanced BiCMOS process
Signal Detect and Clock Detect inputs provided for en-
hanced functionality
Suitable for Fiber Optic PMD replacement applications
a
5V supply
4
DP83223A TWISTER High Speed
Networking Transceiver Device
General Description
The DP83223A Twisted Pair Transceiver is an integrated
circuit capable of driving and receiving either binary or
(MLT-3) encoded datastreams The DP83223A Transceiver
is designed to interface directly with standards compliant
FDDI 100BASE-TX or STS-3c ATM chip sets allowing low
cost data links over copper based media The DP83223A
allows links of up to 100 meters over both Shielded Twisted
Pair (STP) and datagrade Unshielded Twisted Pair (UTP) or
equivalent The electrical performance of the DP83223A
meets or exceeds all performance parameters specified
in the ANSI X3T9 5 TP-PMD standard the IEEE 802 3
100BASE-TX Fast Ethernet Specification and the ATM Fo-
rum 155 Mbps Twisted Pair PMD Interface Specification
The DP83223A also provides important features such as
baseline restoration TRI-STATE capable transmit outputs
and controlled transmit output edge rates (to reduce EMI
radiation) for both binary and MLT-3 modes of operation
Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Compliant with ANSI X3T9 5 TP-PMD standard
Compliant with IEEE 802 3 100BASE-TX Ethernet draft
standard
Compliant with ATM Forum 155 Mbps Twisted Pair
Specification
Integrated baseline restoration circuit
Integrated transmitter and receiver with adaptive equali-
zation circuit
Programmable binary or MLT-3 operation
Isolated TX and RX power supplies for minimum noise
coupling
Controlled transmit output edge rates for reduced EMI
TRI-STATE capable current transmit outputs
Loopback feature for board diagnostics
Programmable transmit voltage amplitude