DP83950BVQB National Semiconductor, DP83950BVQB Datasheet - Page 20

• Manufacturer Part Number: DP83950BVQB
• Description: IC CTRLR RIC REPEATER 160-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83950BVQB

• Controller Type: Ethernet Repeater Interface Controller
• Interface: IEEE 802.3
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 380mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83950BVQB

No
INTER-RIC BUS PINS
Pin
3 0 Pin Descriptions
ANYXND
ANYXNS
ACTND
ACTNS
CLKIN
Name
ACKO
COLN
PKEN
ACKI
IRD
IRC
Pin
IRE
Driver
Type
OD
OD
TT
TT
TT
TT
TT
TT
TT
TT
TT
C
B Z
B Z
B Z
B Z
I O
O
O
O
O
I
I
I
I
ACKNOWLEDGE INPUT Input to the network ports’ arbitration chain
ACKNOWLEDGE OUTPUT Output from the network ports’ arbitration chain
INTER-RIC DATA When asserted as an output this signal provides a serial data stream in NRZ
format The signal is asserted by a RIC when it is receiving data from one of its network
segments The default condition of this signal is to be an input In this state it may be driven by
other devices on the Inter-RIC bus
INTER-RIC ENABLE When asserted as an output this signal provides an activity framing enable
for the serial data stream The signal is asserted by a RIC when it is receiving data from one of
its network segments The default condition of this signal is to be an input In this state it may be
driven by other devices on the Inter-RIC bus
INTER-RIC CLOCK When asserted as an output this signal provides a clock signal for the serial
data stream Data (IRD) is changed on the falling edge of the clock The signal is asserted by a
RIC when it is receiving data from one of its network segments The default condition of this
signal is to be an input When an input IRD is sampled on the rising edge of the clock In this
state it may be driven by other devices on the Inter-RIC bus
COLLISION ON PORT N This denotes that a collision is occurring on the port receiving the
data packet The default condition of this signal is to be an input In this state it may be driven by
other devices on the Inter-RIC bus
PACKET ENABLE This output acts as an active high enable for an external bus transceiver (if
required) for the IRE IRC IRD and COLN signals When high the bus transceiver should be
transmitting on to the bus i e this RIC is driving the IRD IRE IRC and COLN bus lines When
low the bus transceiver should receive from the bus
40 MHz CLOCK INPUT This input is used to generate the RIC’s timing reference for the state
machines and phase lock loop decoder
ACTIVITY ON PORT N DRIVE This output is active when the RIC is receiving data or collision
information from one of its network segments
ACTIVITY ON PORT N SENSE This input senses when this or another RIC in a multi-RIC
system is receiving data or collision information
ACTIVITY ON ANY PORT EXCLUDING PORT N DRIVE This output is active when a RIC is
experiencing a transmit collision or multiple ports have active collisions on their network
segments
ACTIVITY ON ANY PORT EXCLUDING PORT N SENSE This input senses when this RIC or
other RICs in a multi-RIC system are experiencing transmit collisions or multiple ports have
active collisions on their network segments
(Continued)
20
Description