DP83950BVQB National Semiconductor, DP83950BVQB Datasheet - Page 45

• Manufacturer Part Number: DP83950BVQB
• Description: IC CTRLR RIC REPEATER 160-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83950BVQB

• Controller Type: Ethernet Repeater Interface Controller
• Interface: IEEE 802.3
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 380mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83950BVQB

6 0 Hub Management Support
Out of Window Collision (OWC) The out of window colli-
sion flag for a port goes active when a collision is experi-
enced outside of the network slot time
Partition (PART) This flag goes active when a port be-
comes partitioned
Bad Link (BDLNK) The flag goes active when a port is
configured for 10BASE-T operation has entered the link lost
state
Short Event reception (SE) This flag goes active if the
received packet is less than 74 bits long and no collision
occurs during reception
6 3 MANAGEMENT INTERFACE OPERATION
The HUB Management interface provides a mechanism to
combine repeater status information with packet information
to form a hub management status packet The interface a
serial bus consisting of carrier sense received clock and
received data is designed to connect one or multiple RIC’s
over a backplane bus to a DP83932 ‘‘SONIC’’ network con-
troller The SONIC and the RICs form a powerful entity for
network statistics gathering
The interface consists of four pins
MRXC
MCRS
MRXD
PCOMP
The first three signals mimic the interface between an
Ethernet controller and a phase locked loop decoder (spe-
cifically the DP83932 SONIC and DP83910 SNI) these sig-
nals are driven by the RIC receiving the packet MRXC and
MRXD compose an NRZ serial data stream compatible with
the DP83932 The PCOMP signal is driven by logic on the
processor board The actual data stream transferred over
MRXD is derived from data transferred over the IRD Inter-
RIC bus line These two data streams differ in two important
characteristics
1 At the end of packet repetition a hub management status
2 While the data field of the repeated packet is being trans-
field is appended to the data stream This status field
consisting of 7 bytes is shown in Figure 6 1 and 6 2 The
information field is obtained from a number of packet
status registers described below In common with the
802 3 protocol the least significant bit of a byte is trans-
mitted first
ferred over the management bus received clock signals
on the MRXC pin may be inhibited This operation is un-
der the control of the Packet Compress pin PCOMP If
PCOMP is asserted during repetition of the packet then
MRXC signals are inhibited when the number of bytes
(after SFD) transferred over the management bus equals
the number indicated in the Packet Compress Decode
Register This register provides a means to delay the ef-
fect of the PCOMP signal which may be generated early
in the packet’s repetition until the desired moment Pack-
et compression may be used to reduce the amount of
Management Receive Clock 10 MHz NRZ
Clock output
Management Carrier Sense Input Output indi-
cating of valid data stream
Management Receive Data NRZ Data output
synchronous to MRXC
Packet Compress Input to truncate the pack-
et’s data field
(Continued)
45
memory required to buffer packets when they are received
and are waiting to be processed by hub management soft-
ware In this kind of application an address decoder which
forms part of the packet compress logic would monitor the
address fields as they are received over the management
bus If the destination address is not the address of the
management node inside the hub then packet compression
could be employed In this manner only the portion of the
packet meaningful for hub management interrogation i e
the address fields is transferred to the SONIC and is buff-
ered in memory
Note If PCOMP is asserted late in the packet i e after the number of bytes
The Management Interface may be fine tuned to meet the
timing consideration of the SONIC and the access time of
its associated packet memory This refinement may be per-
formed in two ways
1 The default mode of operation of the Management inter-
2 The Management bus has been designed to accommo-
The status field shown in Figure 6 1 contains information
which may be conveniently analyzed by considering it as
If the repeated packet ends before PCOMP is asserted or
before the required number of bytes have been trans-
ferred then the hub management status field is directly
appended to the received data at a byte boundary If the
repeated packet is significantly longer than the value in
the Decode Register requires and PCOMP is asserted the
status fields will be delayed until the end of packet repeti-
tion During this delay period MRXC clocks are inhibited
but the MCRS signal remains asserted
face is to only transfer packets over the bus which have a
start of frame delimiter Thus ‘‘packets’’ that are only pre-
amble jam and do not convey any source or destination
address information are inhibited This filtering may be
disabled by writing a logic zero to the Management Inter-
face Configuration or ‘‘MIFCON’’ bit in the Management
and Interrupt Configuration Register See Section 8 for
details
date situations of maximum network utilization for exam-
ple when collision generated fragments occur (these col-
lision fragments may violate the IEEE802 3 IFG specifica-
tion) The IFG required by the SONIC is a function of the
time taken to release space in the receive FIFO and to
perform end of packet processing (write status informa-
tion into memory) These functions are primarily memory
operations and consequently depend upon the bus laten-
cy and the memory access time of the system In order to
allow the system designer some discretion in choosing
the speed of this memory the RIC may be configured to
protect the SONIC from a potential FIFO overflow This is
performed by utilizing the Inter Frame Gap Threshold Se-
lect Register
The value held in this register plus one defines in net-
work bit times the minimum allowed gap between frames
on the management bus If the gap is smaller than this
number then MCRS is asserted but MRXC clocks are in-
hibited Consequently no data transfer is performed
Thus the system designer may make the decision wheth-
er to gather statistics on all packets even if they occur
with very small IFGs or to monitor a subset
defined by the packet compression register then packet compression
will not occur