PSF21150FV14XP Infineon Technologies, PSF21150FV14XP Datasheet - Page 106

• Manufacturer Part Number: PSF21150FV14XP
• Manufacturer: Infineon Technologies

Specifications of PSF21150FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Table 10
STI
xy
-
xy
xy
xy
xy
xy
An STOV interrupt is not generated if all stimulating STI interrupts are acknowledged.
An STIxy must be acknowledged by setting the ACKxy bit in the ASTI register until two
BCL clocks (for DPS=’0’) or one BCL clocks (for DPS=’1’) before the time slot which is
selected for the appropriate STIxy.
The interrupt structure of the synchronous transfer is shown in
.
Figure 57
Data Sheet
0
0
0
0
0
0
; xy
; xy
; xy
1
1
1
Enabled Interrupts
Interrupt
TRAN
MASK
AUX
MOS
CIC
ICA
ICB
(Register MSTI)
ICD
ST
Examples for Synchronous Transfer Interrupts
Interrupt Structure of the Synchronous Data Transfer
STOV
-
xy
xy
xy
xy
xy
xy
0
1
0
0
1
0
TRAN
; xy
; xy
; xy
ISTA
AUX
MOS
CIC
ICA
ICB
ICD
ST
1
1
1
; xy
2
STI
xy
-
xy
xy
xy
xy
xy
xy
xy
xy
STOV20
STOV21
STOV11
STOV10
0
0
0
0
1
0
1
0
1
MSTI
STI20
STI11
STI10
STI21
106
Generated Interrupts
(Register STI)
Description of Functional Blocks
STOV
-
-
xy
xy
xy
xy
-
xy
xy
xy
STOV10
STOV20
STOV11
STOV21
1
0
0
1
1
0
1
STI21
STI20
STI11
STI10
STI
; xy
; xy
; xy
1
2
2
Figure
PSB/PSF 21150
57.
ACK10
ACK11
Example 1
Example 2
Example 3
Example 4
Example 5
Example 6
Example 7
ACK21
ACK20
ASTI
2003-01-30
IPAC-X