PSF21150FV14XP Infineon Technologies, PSF21150FV14XP Datasheet - Page 43

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PSF21150FV14XP

Manufacturer Part Number
PSF21150FV14XP
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSF21150FV14XP

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
3.2.4
Figure 12
.
Figure 12
Reset Source Selection
The internal reset sources C/I code change, EAW and Watchdog can be output at the
low active reset pin RSTO. The selection of these reset sources can be done with the
RSS2,1 bits in the MODE1 register according
The setting RSS2,1 = ’01’ is reserved for further use. In this case no reset is output at
RSTO. The internal reset sources sets the MODE1 register to its reset value.
Data Sheet
C/I Code Change
(Exchange Awake)
EAW
(Subscriber Awake)
Watchdog
Software Reset
Register (SRES)
Reset
Functional
Block
Internal Reset of all Registers
Reset MODE1 Register
shows the organization of the reset generation of the device.
D, C/I-channel (00
Transceiver (30
IOM-2 (40
MON-channel (5C
General Config (60
B-channels (70
Reset Generation
Reset Generation
125µs £ t £ 250µs
125µs £ t £ 250µs
125µs £ t £ 250µs
125µs £ t £ 250µs
H
-5B
H
H
)
H
-8F
-3F
H
H
H
-2F
H
-5F
H
-6F
)
)
H
H
H
)
)
)
³ 1
'0'
'1'
RSS1
'1x'
'00'
RSS2,1
43
Table
³ 1
Description of Functional Blocks
6.
' 01 '
(reserved)
'01'
RSS2,1
PSB/PSF 21150
³ 1
2003-01-30
Pin
RES
Pin
RSTO
21150_21
IPAC-X

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