PSF21150FV14XP Infineon Technologies, PSF21150FV14XP Datasheet - Page 153

• Manufacturer Part Number: PSF21150FV14XP
• Manufacturer: Infineon Technologies

Specifications of PSF21150FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

The IPAC-X indicates to the host that a new data block can be read from the RFIFOx by
means of an RPF interrupt (see previous chapter). User data is stored in the RFIFOx and
information about the received frame is available in the RBCLx and RBCHx registers and
the RSTAx bytes which are listed in
Table 19
Information
Type of frame
(Command/
Response)
Recognition of SAPI
Recognition of TEI
Result of CRC check
(correct/incorrect)
Valid Frame
Abort condition detected
(yes/no)
Data overflow during reception
of a frame (yes/no)
Number of bytes received in
RFIFO
Message length
RFIFO Overflow
The RSTAx register is always appended in the RFIFOx as last byte to the end of a frame.
Note: The number of bytes received in RFIFOx depends on the selected receive FIFO
Data Sheet
threshold (EXMx.RFBS).
Receive Information at RME Interrupt
Register
RSTAx
RSTAD
RSTAB
RSTAD
RSTAB
RSTAx
RSTAx
RSTAx
RSTAx
RBCL
RBCLx
RBCHx
RBCHx
Table
153
19.
Bit
C/R
SA1, 0
HA1, 0
TA
LA
CRC
VFR
RAB
RDO
RBC4-0
RBC11-0 All
OV
Description of Functional Blocks
Mode
Non-auto mode,
2-byte address field
Transparent mode 1
Non-auto mode,
2-byte address field
Transparent mode 1
All except
transparent mode 0
All
All
All
All
All
All
PSB/PSF 21150
2003-01-30
IPAC-X