PSF21150FV14XP Infineon Technologies, PSF21150FV14XP Datasheet - Page 227

• Manufacturer Part Number: PSF21150FV14XP
• Manufacturer: Infineon Technologies

Specifications of PSF21150FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

MASKB
STARB
• after a device reset
XDU ... Transmit Data Underrun
The current transmission of a frame is aborted by transmitting seven ’1’s because the
XFIFOB holds no further data. This interrupt occurs whenever the microcontroller has
failed to respond to an XPR interrupt (ISTAB register) quickly enough, after having
initiated a transmission and the message to be transmitted is not yet complete.
4.6.2
Value after reset: FF
Each interrupt source in the ISTAB register can selectively be masked by setting the
corresponding bit in MASKB to ’1’. Masked interrupt status bits are not indicated when
ISTAB is read. Instead, they remain internally stored and pending until the mask bit is
reset to ’0’.
For general information please refer to
4.6.3
Value after reset: 40
XDOV ... Transmit Data Overflow
More than 16 or 32 bytes (according to selected block size) have been written to the
XFIFOB, i.e. data has been overwritten.
XFW ... Transmit FIFO Write Enable
Data can be written to the XFIFOB. This bit may be polled instead of (or in addition to)
using the XPR interrupt.
Data Sheet
7
7
XDOV XFW
MASKB - Mask Register B-Channels
STARB - Status Register B-Channels
RME
RPF
H
H
RFO
0
XPR
0
Chapter
227
RACI
1
3.9.6.
XDU
0
Detailed Register Description
XACI
1
0
0
PSB/PSF 21150
1
0
WR (70/80)
RD (71/81)
2003-01-30
IPAC-X