MAX9268GCM/V+ Maxim Integrated Products, MAX9268GCM/V+ Datasheet - Page 13

• Manufacturer Part Number: MAX9268GCM/V+
• Description: IC SERIALIZER GMSL LVDS 48TQFP
• Manufacturer: Maxim Integrated Products

Specifications of MAX9268GCM/V+

• Function: Deserializer
• Data Rate: 2.5Gbs
• Input Type: Serial
• Output Type: LVDS
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Outputs: -
• Number Of Inputs: -

Table 1. Power-Up Default Register Map (see Table 12)
The MAX9268 deserializer with LVDS system inter-
face utilizes Maxim’s GMSL technology. The MAX9268
deserializer pairs with any GMSL serializer to form a
complete digital serial link for joint transmission of high-
speed video, audio, and bidirectional control data.
The MAX9268 allows a maximum serial payload data
rate of 2.5Gbps for greater than 15m of STP cable. The
deserializer operates up to 104MHz for 3-channel LVDS
or 78MHz for 4-channel LVDS. The operating frequency
range supports display panels from QVGA (320 x 240)
up to WXGA (1280 x 800) and higher with 24-bit color.
The 3-channel mode outputs an LVDS clock, three
lanes of LVDS data (21 bits), UART control signals,
and one I
nals). The 4-channel mode outputs an LVDS clock, four
lanes of LVDS data (28 bits), UART control signals,
one I
interface supports sample rates from 8kHz to 192kHz
and audio word lengths of 4 to 32 bits. The embed-
ded control channel forms a full-duplex, differential,
100kbps to 1Mbps UART link between the serializer and
deserializer. An ECU or FC can be located on the
REGISTER
ADDRESS
(hex)
0x00
0x01
0x02
0x03
2
S audio channel, and control signals. The I
2
S audio channel (consisting of three sig-
Gigabit Multimedia Serial Link Deserializer
0xC0, 0xC4, 0xC8
0xD0, 0xD4, 0xD8
0x80, 0x84, 0x88,
0x50, 0x54, 0x58,
0x90, 0x94, 0x98,
0x40, 0x44, 0x48
______________________________________________________________________________________
0x1F or 0x5F
POWER-UP
DEFAULT
(hex)
0x00
Detailed Description
SERID = XX00XX0, serializer device address is determined by ADD1 and ADD0
(Table 2)
RESERVED = 0
DESID =XX01XX0, deserializer device address is determined by ADD1 and ADD0
(Table 2)
RESERVED = 0
SS = 00 (SSEN = low), SS = 01 (SSEN = high), spread-spectrum settings depend on
SSEN pin state at power-up
RESERVED = 0
AUDIOEN = 1, I
PRNG = 11, automatically detect the pixel clock range
SRNG = 11, automatically detect serial-data rate
AUTOFM = 00, calibrate spread-modulation rate only once after locking
RESERVED = 0
SDIV = 00000, autocalibrate sawtooth divider
with LVDS System Interface
2
S channel enabled
2
S
POWER-UP DEFAULT SETTINGS
serializer side of the link (typical for video display), on the
MAX9268 side of the link (typical for image sensing), or
on both sides. In addition, the control channel enables
ECU/FC control of peripherals in the remote side, such
as backlight control, grayscale Gamma correction,
camera module, and touch screen. Base-mode com-
munication with peripherals uses either I
UART format. A bypass mode enables full-duplex com-
munication using custom UART formats.
The MAX9268 channel equalizer, along with the
serializer preemphasis, extends the link length and
enhances the link reliability. Spread spectrum is avail-
able to reduce EMI on the LVDS and control outputs of
the MAX9268. The serial input complies with ISO 10605
and IEC 61000-4-2 ESD protection standards.
The FC configures various operating conditions of the
GMSL serializer and the MAX9268 through internal
registers. The default device addresses are stored in reg-
isters 0x00 and 0x01 of both the GMSL serializer and the
MAX9268 (Table 1). Write to the 0x00 and 0x01 registers
in both devices to change the device address of the GMSL
serializer or the MAX9268.
(MSB FIRST)
Register Mapping
2
C or the GMSL
13