MAX9268GCM/V+ Maxim Integrated Products, MAX9268GCM/V+ Datasheet - Page 7

• Manufacturer Part Number: MAX9268GCM/V+
• Description: IC SERIALIZER GMSL LVDS 48TQFP
• Manufacturer: Maxim Integrated Products

Specifications of MAX9268GCM/V+

• Function: Deserializer
• Data Rate: 2.5Gbs
• Input Type: Serial
• Output Type: LVDS
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Outputs: -
• Number Of Inputs: -

8, 24, 31, 37, 48
5, 23, 32, 47
PIN
6, 7
1
2
3
4
9
Gigabit Multimedia Serial Link Deserializer
_______________________________________________________________________________________
IN+, IN-
GPIO0
NAME
AGND
AVDD
BWS
CDS
EQS
INT
TOP VIEW
IOVDD
Bus-Width Select. Output width selection requires external pulldown or pullup resistor. Set
BWS = low for 3-channel mode. Set BWS = high for 4-channel mode.
Interrupt Input. Requires external pulldown or pullup resistor. A transition on the MAX9268’s
INT input toggles the GMSL serializer’s INT output.
Control Direction Selection. Control link direction selection input requires external pulldown or
pullup resistor. Set CDS = low for FC on the GMSL serializer side of the serial link. Set CDS =
high for FC on the MAX9268 side of the serial link.
General-Purpose I/O 0. Open-drain, general-purpose input/output with internal 60kI (typ)
pullup resistor to IOVDD. GPIO0 is high impedance during power-up and when PWDN = low.
3.3V Analog Power Supply. Bypass AVDD to AGND with 0.1FF and 0.001FF capacitors as
close as possible to the device with the smaller capacitor closest to AVDD.
Differential CML Input. Differential input of the serial link.
Analog Ground
Equalizer Select Input. EQS requires external pulldown or pullup resistor. The state of EQS
latches upon power-up or when resuming from power-down mode (PWDN = low). Set
EQS = low for 10.7dB equalizer boost (EQTUNE = 1001). Set EQS = high for 5.2dB
equalizer boost (EQTUNE = 0100).
AGND
AGND
AVDD
ADD0
ADD1
LOCK
SSEN
GND
DRS
ERR
MS
37
38
39
40
41
42
43
44
45
46
47
48
+
36 35 34
1
2
3
with LVDS System Interface
33 32 31 30 29 28 27 26 25
4
5
MAX9268
TQFP
6
7
8
9 10 11 12
EP
FUNCTION
24
23
22
21
20
19
18
17
16
15
14
13
AGND
AVDD
GND
IOVDD
CNTL2/MCLK
CNTL1
SD/CNTL0
SCK
WS
PWDN
TX/SCL
RX/SDA
Pin Configuration
Pin Description
7