TE28F256J3C125 Intel, TE28F256J3C125 Datasheet - Page 65

• Manufacturer Part Number: TE28F256J3C125
• Manufacturer: Intel

Specifications of TE28F256J3C125

• Cell Type: NOR
• Density: 256Mb
• Access Time (max): 125ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 25/24Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 32M/16M
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

Datasheet
Figure 24. Set Block Lock-Bit Flowchart
FULL STATUS CHECK PROCEDURE
Set Lock-Bit Complete
Read Status Register
Read Status Register
Data (See Above)
Check if Desired
Block Address
Block Address
Set Lock-Bit
Write 60H,
Write 01H,
Successful
Full Status
SR.4,5 =
SR.7 =
SR.3 =
SR.4 =
Start
0
0
0
1
0
1
1
1
Command Sequence
Voltage Range Error
Set Lock-Bit Error
Error
Repeat for subsequent lock-bit operations.
Full status check can be done after each lock-bit set operation or after
a sequence of lock-bit set operations.
Write FFH after the last lock-bit set operation to place device in read
array mode.
SR.5, SR.4 and SR.3 are only cleared by the Clear Status Register
command, in cases where multiple lock-bits are set before full status is
checked.
If an error is detected, clear the status register before attempting retry
or other error recovery.
Operation
Operation
Standby
Standby
Standby
Standby
Write
Write
Read
Bus
Bus
Set Block Lock-Bit
Set Block Lock-Bit
Command
Command
Confirm
Setup
Check SR.3
1 = Programming Voltage Error
Check SR.4, 5
Both 1 = Command Sequence
Check SR.4
1 = Set Lock-Bit Error
Error
256-Mbit J3 (x8/x16)
Detect
Data = 60H
Addr =Block Address
Data = 01H
Addr = Block Address
Status Register Data
Check SR.7
1 = WSM Ready
0 = WSM Busy
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