TXC-06101AILQ Transwitch Corporation, TXC-06101AILQ Datasheet - Page 105

• Manufacturer Part Number: TXC-06101AILQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-06101AILQ

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: PQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Not Compliant

CONTROL REGISTER 5
Notes:
1. If SPE-only Mode is selected, this control is disabled and Bit Equal to "0" condition applies.
2. If either (SPE and DATACOM = "0") or (SPE = "1", Pin MBEI is Low and DATACOM = "0") then the device is in SONET
3. RSPE is always High, and TPCO is never gapped, during fixed stuff Bytes times (columns 30 and 59).
Address
0FD
Mode. See Table 1.
[H]
Bit
7
6
5
4
3
2
1
0
Proprietary TranSwitch Corporation Information for use Solely by its Customers
ENDCMPOH
DATACOM
DISPCKG
MBSEL1
MBSEL0
INVPCK
Symbol
INVINT
DIEN
Device Layer Interrupt Enable:
enables Device Layer Interrupts
DATACOM Mode Control:
places device in DATACOM Mode
Enable Datacom POH:
RSPE and TSPEI/O are High dur-
ing POH Byte times
Disable Parallel Clock Gapping:
TPCO is continuous
Invert Parallel Clock:
TPDO(0-7), RSPE, RSYN and
TPARO occur on the Rising Edge
of TPCO. When DATACOM = "0",
TPDI(0-7), TSPEI/O, TSYNI/O and
TPARI are clocked in on the Falling
Edge of TPCI/O. When DATACOM
= "1", TPDI(0-7) and TPARI are
clocked in on and TSYNI/O and
TSPEI/O are clocked out on, the
Rising Edge of TPCI/O.
Multiplex Bus Select (1,0): determines time slot assignment in 19.44
Mbyte/s modes for Rx Terminal Port (and Tx Terminal Port).
Invert Interrupt:
Pin INT/IRQ transitions Low to indi-
cate interrupt when pins µPSEL0,
µPSEL1 = High, Low or High, High
(Intel or multiplexed A/D). Pin
INT/IRQ transitions High to indicate
interrupt when µPSEL0, µPSEL1 =
Low, Low (Motorola).
MBSEL1
Bit Equal to "1"
0
0
1
1
MBSEL0
- 105 of 196 -
0
1
0
1
DATA SHEET
Conditions
Time Slot
Unassigned
First
Second
Third
disables Device Layer Interrupts
device not in DATACOM Mode
RSPE and TSPEI/O are Low dur-
ing POH Byte times
TPCI/O and TPCO are gapped dur-
ing TOH Byte times and when
ENDCMPOH = "0", also during
POH Byte times.
TPDO(0-7), RSPE, RSYN and
TPARO occur on the Falling Edge
of TPCO. When DATACOM = "0",
TPDI(0-7), TSPEI/O, TSYNI/O and
TPARI are clocked in on the Rising
Edge of TPCI/O. When DATACOM
= "1", TPDI(0-7) and TPARI are
clocked in on and TSYNI/O and
TSPEI/O are clocked out on, the
Falling Edge of TPCI/O.
Pin INT/IRQ transitions High to
indicate interrupt when pins
µPSEL0, µPSEL1 = High, Low or
High, High (Intel or multiplexed
A/D). Pin INT/IRQ transitions Low
to indicate interrupt when µPSEL0,
µPSEL1 = Low, Low (Motorola).
Bit Equal to "0"
Effective only in
Effective only in
Datacom Mode
Datacom Mode
see ENFSTUA
and ENLSTUA
and TMBSEL1
only enabled if
see TMBSEL0
See Table
Comments
Pin MBEI is
TXC-06101
Notes 1, 2
Ed. 3, April 2001
TXC-06101-MB
Note 3
Note 3
Note 1
PHAST-1
Low
28