CY7C019V-25AC Cypress Semiconductor Corp, CY7C019V-25AC Datasheet - Page 8

• Manufacturer Part Number: CY7C019V-25AC
• Description: SRAM Chip Async Dual 3.3V 1.125M-Bit 128K x 9-Bit 25ns 100-Pin TQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C019V-25AC

• Package: 100TQFP
• Timing Type: Asynchronous
• Density: 1.125 Mb
• Typical Operating Supply Voltage: 3.3 V
• Address Bus Width: 17 Bit
• Number Of I/o Lines: 9 Bit
• Number Of Ports: 2
• Number Of Words: 128K

Document #: 38-06044 Rev. *C
Switching Waveforms
Read Cycle No. 3 (Either Port)
Read Cycle No.2 (Either Port CE/OE Access)
Read Cycle No.1 (Either Port Address Access)
CURRENT
Notes:
DATA OUT
19. R/W is HIGH for read cycles.
20. Device is continuously selected CE = V
21. OE = V
22. Address valid prior to or coincident with CE transition LOW.
23. To access RAM, CE = V
ADDRESS
DATA OUT
ADDRESS
DATA OUT
IL
CE
.
I
OE
I
CE
CC
SB
PREVIOUS DATA VALID
IL
, SEM = V
t
OHA
[19, 21, 22, 23]
IH
. To access semaphore, CE = V
IL
. This waveform cannot be used for semaphore reads.
t
AA
t
PU
t
AA
t
t
LZCE
LZCE
t
LZCE
[19, 22, 23]
t
t
ACE
ABE
[19, 20, 21]
t
LZOE
t
t
RC
ACE
t
RC
IH
t
DOE
, SEM = V
IL
.
DATA VALID
DATA VALID
t
OHA
CY7C008V/009V
CY7C018V/019V
t
t
t
OHA
HZCE
PD
t
t
HZOE
HZCE
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