ISL5216KI-1 Intersil, ISL5216KI-1 Datasheet - Page 22

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ISL5216KI-1

Manufacturer Part Number
ISL5216KI-1
Description
Digital Down Converter 196-Pin BGA
Manufacturer
Intersil
Datasheet

Specifications of ISL5216KI-1

Package
196BGA
Operating Temperature
-40 to 85 °C

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Basic Instruction Set Examples
1. Wait for number of input samples > threshold
2. Jump unconditional
3. Jump RSCO (jump on resampler NCO carry output)
4. Jump RSCO (jump on no resampler NCO carry output)
POSITIONS
125:123
127:126
127:9 = 0
8:0 = 001
0000,0000,0000,0001h
127:9 = 0
8:0 = 1JJJJJ111b
example: jump to step 0= 0000,0000,0000,0107h
127:9 = 0
8:0 = 1JJJJJ101b
example: jump RSCO, step 0= 0000,0000,0000,0105h
127:9 = 0
BIT
Block-to-Block Step
Coefficient Memory
0 - WAIT FOR ENOUGH SAMPLES
1 - FIR
2 - JUMP TO STEP 0
Four bit fields must be filled in:
The rest of the instruction RAM would typically be filled with NOP instructions:
FUNCTION
0000
0000
0000
0000
0000
00TT
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
F - filter type (this example applies to types 1-5)
D - decimation (also loaded into wait threshold)
T - number of taps minus 1
R - clocks/calculation (=floor((taps+1)/2) for symmetric, = taps for asymmetric)
Reserved
22
TTTT
0000
0000
0000
0000
0001
1000
0000
0000
0000
0000
0000
0000
0000
0000
1011
Set to 0
(ADDRC) Usually set to 0.
125:123
0
1
2
3
4
5
6
7
TTTD
0000
0000
0000
0000
0101
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
INSTRUCTION BIT FIELDS (Continued)
DDDD
Step size
0
1
2
4
8
16
32
64
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
1111
DDDD
0FFF
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
1111
ISL5216
100R
FFF0
0000
0000
0000
0000
0000
1010
0000
0000
0000
0001
0000
0000
0000
0000
Single FIR Basic Program
This is the basic program for a single FIR. This program
applies to decimation filters (including DECx1) that are
symmetric or asymmetric (but not complex). The FIR output
is routed through path A with the AGC enabled.
5. NOP single clock
6. Load Loop Counter
8:0 = 1JJJJJ100b
example: jump RSCO, step 0 = 0000,0000,0000,0104h
127:9 = 0
8:0 = 010000000b
NOP1 = 0000,0000,0000,0080h
127:21 = 0
20:9 = Loop counter preload (tested against 0)
8:0 = 010000100b
example: LdLpCntr 14 = 0000,0000,0000,1C84h
RRRR
0000
0000
0000
0000
0000
0000
1100
0000
0000
0000
0000
0000
0000
0000
1000
DESCRIPTION
RRRR
0000
0000
0000
0001
0000
1000
0000
0000
0000
0000
0000
0000
0000
0111
0111
127:96
127:96
127:96
127:96
95:64
64:32
95:64
63:32
95:64
64:32
95:64
64:32
31:0
31:0
31:0
31:0
00000000h
00000000h
00000000h
00000001h
08000A00h
00000000h
00000000h
00000000h
00000107h
00000000h
00000000h
00000000h
00000080h
0B00--C8h
015FF---h
-----007h
July 13, 2007
FN6013.3

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