MACH211-15VC Lattice, MACH211-15VC Datasheet - Page 9

• Manufacturer Part Number: MACH211-15VC
• Description: CPLD MACH 2 Family 2.5K Gates 64 Macro Cells 66.6MHz EECMOS Technology 5V 44-Pin TQFP
• Manufacturer: Lattice

Specifications of MACH211-15VC

• Package: 44TQFP
• Family Name: MACH 2
• Device System Gates: 2500
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 32
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 66.6 MHz
• Number Of Product Terms Per Macro: 16
• Operating Temperature: 0 to 70 °C

Allocator
Allocator
Allocator
Allocator
Logic
From
Logic
From
From
Logic
CLK 0
CLK n
CLK n
CLK 0
CLK n
Logic
CLK 0
From
To Switch
To Switch
To Switch
g. Latch, active high (MACH 2 only)
Matrix
Matrix
To Switch
Matrix
c. D-type register, active high
Matrix
a. Combinatorial, active high
n
e. T-type register, active high
n
n
n
D
G
L
T
AP
AR
AP
AR
AR
AP
Q
Figure 4. Output Macrocell Configurations
Q
Q
MACH 1 & 2 Families
To
I/O
Cell
To
I/O
Cell
To
I/O
Cell
To
I/O
Cell
Allocator
Allocator
Allocator
Allocator
Logic
From
From
Logic
CLK 0
CLK n
Logic
CLK n
From
CLK 0
Logic
From
CLK n
CLK 0
To Switch
To Switch
To Switch
Matrix
To Switch
Matrix
h. Latch, active low (MACH 2 only)
Matrix
Matrix
n
f. T-type register, active low
b. Combinatorial, active low
d. D-type register, active low
n
n
n
G
L
AP
AR
D
T
AP
AR
AP
AR
Q
Q
Q
14051K-005
To
I/O
Cell
To
I/O
Cell
To
I/O
Cell
To
I/O
Cell
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