CS5396-KS Cirrus Logic Inc, CS5396-KS Datasheet - Page 10

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CS5396-KS

Manufacturer Part Number
CS5396-KS
Description
ADC Dual Delta-Sigma 96KSPS 24-Bit Serial 28-Pin SOIC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5396-KS

Package
28SOIC
Resolution
24 Bit
Sampling Rate
96 KSPS
Architecture
Delta-Sigma
Number Of Analog Inputs
2
Digital Interface Type
Serial (SPI)
Input Type
Voltage
Sample And Hold
Yes
Polarity Of Input Voltage
Bipolar

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I
Inputs: Logic 0 = DGND, Logic 1 = VD; C
Notes: 9. Use of the I
10
I
CCLK Clock Frequency
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
CDIN Hold Time from CCLK Falling
CDIN Setup Time to CCLK Rising
Rise Time of Both CDIN and CCLK Lines
Fall Time of Both CDIN and CCLK Lines
Setup Time for Stop Condition
2
2
C
C CONTROL PORT SWITCHING CHARACTERISTICS
®
Mode
10. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
CDIN
CCLK
Stop
2
t buf
C
Parameter
®
bus interface requires a license from Philips.
Start
t hdst
t
low
L
= 20 pF)
t
hdd
t high
(Note 9)
(Note 10)
t sud
Symbol
t
Repeated
t
t
t
t
t
t
t
susp
f
hdst
high
sust
hdd
sud
t sust
low
buf
scl
t
t
r
Start
f
t
hdst
t r
Min
250
4.7
4.0
4.7
4.0
4.7
4.7
0
-
-
-
(T
t f
A
= 25 °C; VD, VA = 5V ±5%;
CS5396 CS5397
Stop
t susp
Max
100
300
1
-
-
-
-
-
-
-
-
DS229PP2
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs

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