CS5396-KS Cirrus Logic Inc, CS5396-KS Datasheet - Page 28

• Manufacturer Part Number: CS5396-KS
• Description: ADC Dual Delta-Sigma 96KSPS 24-Bit Serial 28-Pin SOIC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5396-KS

• Package: 28SOIC
• Resolution: 24 Bit
• Sampling Rate: 96 KSPS
• Architecture: Delta-Sigma
• Number Of Analog Inputs: 2
• Digital Interface Type: Serial (SPI)
• Input Type: Voltage
• Sample And Hold: Yes
• Polarity Of Input Voltage: Bipolar

Digital Control & Peak Signal Level (address 00000111)
addren(chip address enable)
pken(PEAK enable) Default = ‘0’.
pkupdate(PEAK update)
hr/_bg(PEAK display format)
ddpd(digital filter power down enable)
fir2in(external fir2 input enable)
psychoin (external psychoacoustic filter input enable)
28
ADDREN
7
0
pken
2) Release the SDATA1 pin of the chip that is going to be programmed with chip address.
3) Send chip address and “addren”=’1’ (in Register 7) through the serial control port. (The re-
maining devices will not repond to this request.)
4) Repeat step 2) and step 3) for to other chips one-by-one. (SDATA1 output is tri-stated until
it is released from pull up.)
Default = ‘0’.
When this bit is ‘0’, no chip address comparison is done. The chip will response to all the request
from Control Port.
When this bit is ‘1’, the chip responds to the µC only if the chip address from the µC matches
the chip address stored in “caddr(6-0)”.
PSL bits calculation is based on the high precision 24-bit output.
PSL bits output follows the serial audio port that sends out 24-bit data.
If this bit is disabled, the PSL bits location on the output stream will be replaced by zeros.
Default = ‘0’.
A ‘0’ to ‘1’ transition will load the peak value (since the last update) to the appropriate serial au-
dio port. The internal peak register will then reset to ‘0’.
Default = ‘0’.
High resolution tag format (hr/_bg=’1’) converts the 24-bit decimation filter output into 1 dB step.
Bar Graph tag format (hr/_bg=’0’) allows LCD display format of the 24-bit output with 8 discrete
values.
Default = ‘0’.
The digital filter and serial audio port is in power down mode when ddpd = ‘1’.
Default = ‘0’.
Input of 2nd stage decimation filter is taken from the sdata2 port. The input data will be deci-
mated by 2 and then output to sdata1 of serial audio port.
Default = ‘0’.
Input of psychoacoustic filter is taken from the sdata2 port. The 24-bit input data will be truncat-
ed in psychoacoustic filter to the chosen output word length and then output to sdata1 of serial
audio port.
6
0
pkupdate
5
0
hr/_bg
4
0
3
ddpd
2
0
CS5396 CS5397
fir2in
1
0
psychoin
DS229PP2
0
0