AT86RF232 Atmel Corporation, AT86RF232 Datasheet - Page 134
AT86RF232
Manufacturer Part Number
AT86RF232
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT86RF232.pdf
(175 pages)
Specifications of AT86RF232
Max. Operating Frequency
0 MHz
Crypto Engine
AES
Operating Voltage (vcc)
1.8 to 3.6
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
0.25
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-100
Receive Current Consumption (ma)
11.8
Transmit Current Consumption (ma)
13.8
Link Budget (dbm)
103
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11.3 Antenna Diversity
11.3.1 Overview
11.3.2 Antenna Diversity Application Example
134
AT86RF232
The Antenna Diversity implementation is characterized by:
Improves signal path robustness between nodes
Atmel AT86RF232 self-contained antenna diversity algorithm
Direct register based antenna selection
Due to multipath propagation effects between network nodes, the receive signal
strength may vary and affect the link quality, even for small changes of the antenna
location. These fading effects can result in an increased error floor or loss of the
connection between devices.
To improve the reliability of an RF connection between network nodes Antenna
Diversity can be applied to reduce effects of multipath propagation and fading. Antenna
Diversity uses two antennas to select the most reliable RF signal path. To ensure highly
independent receive signals on both antennas, the antennas should be carefully
separated from each other.
If a valid IEEE 802.15.4 frame is detected on one antenna, this antenna is selected for
reception. Otherwise the search is continued on the other antenna and vice versa.
Antenna Diversity can be used in Basic and Extended Operating Modes and can also
be combined with other features and operating modes.
A block diagram for an application using an antenna switch is shown in
Figure 11-9. Antenna Diversity – Block Diagram.
Generally, if the antenna diversity used the control of an antenna diversity switch must
be enabled by register bit ANT_EXT_SW_EN (register 0x0D, ANT_DIV). The internal
connection to digital ground of the control pins pin 9 (DIG1) and pin 10 (DIG2) is
disabled (refer to
to the differential inputs of the RF Switch (SW1).
ANT0
ANT1
SW1
Section
B1
1.3), and they feed the antenna switch signal and its inverse
1
2
3
4
5
6
AVSS
AVSS
RFP
RFN
AVSS
...
AVSS
9
AT86RF232
10
8321A–MCU Wireless–10/11
Figure
11-9.
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