AT86RF232 Atmel Corporation, AT86RF232 Datasheet - Page 49

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AT86RF232

Manufacturer Part Number
AT86RF232
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT86RF232

Max. Operating Frequency
0 MHz
Crypto Engine
AES
Operating Voltage (vcc)
1.8 to 3.6
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
0.25
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-100
Receive Current Consumption (ma)
11.8
Transmit Current Consumption (ma)
13.8
Link Budget (dbm)
103
7.2.3.1 Description of RX_AACK Configuration Bits
8321A–MCU Wireless–10/11
Overview
Table 7-5
transaction. For address filtering it is further required to setup address registers to
match the expected address.
Configuration and address bits are to be set in TRX_OFF or PLL_ON state prior to
switching to RX_AACK mode.
A graphical representation of various operating modes is illustrated in
Table 7-5. Overview of RX_AACK Configuration Bits.
The usage of the RX_AACK configuration bits for various operating modes of a node is
explained in the following sections. Configuration bits not mentioned in the following two
sections should be set to their reset values according to
All registers mentioned in
The general behavior of the “Atmel AT86RF232 Extended Feature Set”,
settings:
are completely independent from RX_AACK mode and can be arbitrarily combined.
0x20,0x21
0x22,0x23
Register
Address
o ANT_DIV
o RX_PDT_LEVEL
0x0C
0x2C
0x2B
0x2E
0x2E
0x2E
0x2E
0x24
0x17
0x17
0x17
0x17
summarizes all register bits which affect the behavior of an RX_AACK
Register
Bits
7:6
7
1
2
4
5
0
3
4
5
Register Name
SHORT_ADDR_0/1
PAN_ADDR_0/1
IEEE_ADDR_0
IEEE_ADDR_7
RX_SAFE_MODE
AACK_PROM_MODE
AACK_ACK_TIME
AACK_UPLD_RES_FT
AACK_FLTR_RES_FT
SLOTTED_OPERATION
AACK_I_AM_COORD
AACK_DIS_ACK
AACK_SET_PD
AACK_FVN_MODE
Table 7-5
(Antenna Diversity)
(blocking frame reception of lower power signals)
are described in
Description
Set node addresses.
Protect buffer after frame reception.
Support promiscuous mode.
Change auto acknowledge start time.
Enable reserved frame type reception,
needed to receive non-standard compliant
frames.
Filter reserved frame types like data frame
type, needed for filtering of non-standard
compliant frames.
If set, acknowledgment transmission has
to be triggered by pin 11 (SLP_TR)
If set, the device is a PAN coordinator,
that is responds to a null address.
Disable generation of acknowledgment.
Set frame pending subfield in Frame
Control Field (FCF), refer to
Section
Controls the ACK behavior, depending on
FCF frame version number.
Section
8.1.2.2.
Table
7.2.6.
14-2.
AT86RF232
Figure
Chapter
7-11.
11,
49

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