M42800A Atmel Corporation, M42800A Datasheet - Page 17

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M42800A

Manufacturer Part Number
M42800A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of M42800A

Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
54
Usb Speed
No
Usb Interface
No
Spi
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
8.3
8.4
8.4.1
8.4.2
8.4.3
1779ES–ATARM–14-Apr-06
Peripheral Data Controller
System Peripherals
PMC: Power Management Controller
ST: System Timer
AIC: Advanced Interrupt Controller
The AT91M42800A has an 8-channel PDC dedicated to the two on-chip USARTs and to the two
on-chip SPIs. One PDC channel is connected to the receiving channel and one to the transmit-
ting channel of each peripheral.
The user interface of a PDC channel is integrated in the memory space of each USART channel
and in the memory space of each SPI. It contains a 32-bit address pointer register and a 16-bit
count register. When the programmed data is transferred, an end-of-transfer interrupt is gener-
ated by the corresponding peripheral. See the USART section and the SPI sections for more
details on PDC operation and programming.
The AT91M42800A’s Power Management Controller optimizes the power consumption of the
device. The PMC controls the clocking elements such as the oscillator and the PLLs, and the
System and the Peripheral Clocks. It also controls the MCKO pin and permits to the user to
select four different signals to be driven on this pin.
The AT91M42800A has the following clock elements:
The on-chip low-power oscillator together with the PLL-based frequency multiplier and the pres-
caler results in a programmable clock between 500 Hz and 66 MHz. It is the responsibility of the
user to make sure that the PMC programming does not result in a clock over the acceptable
limits.
The System Timer module integrates three different free-running timers:
These timers count using the Slow Clock provided by the MCU. Typically, this clock has a fre-
quency of 32768 Hz.
The AT91M42800A has an 8-level priority, individually maskable, vectored interrupt controller.
This feature substantially reduces the software and real-time overhead in handling internal and
external interrupts.
• The oscillator providing a clock that depends on the crystal fundamental frequency
• PLL A providing a low-to-middle frequency clock range
• PLL B providing a middle-to-high frequency range
• The Clock prescaler
• The ARM Processor Clock controller
• The Peripheral Clock controller
• The Master Clock Output controller
• A Period Interval Timer setting the base time for an Operating System.
• A Watchdog Timer that is built around a 16-bit counter, and is used to prevent system lock-up
• A Real-time Timer counting elapsed seconds.
connected between the XIN and XOUT pins
if the software becomes trapped in a deadlock. It can generate an internal reset or interrupt,
or assert an active level on the dedicated pin NWDOVF.
AT91M42800A
17

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