SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 223

• Manufacturer Part Number: SAM9M10
• Manufacturer: Atmel Corporation

Specifications of SAM9M10

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

B.1.2
ARM DDI 0029G
TAP state machine
tms=1
tms=0
Test-Logic Reset
Run-Test/Idle
0xC
0xF
The process of serial test and debug is best explained in conjunction with the JTAG state
machine. Figure B-2 on page B-5 shows the state transitions that occur in the TAP
controller.
From IEEE Std 1149.1-1990. Copyright 1994-2001 IEEE. All rights reserved.
tms=0
tms=1
Copyright © 1994-2001. All rights reserved.
tms=0
tms=1
tms=1
Figure B-2 Test access port controller state transitions
Select-DR-Scan
Capture-DR
Update-DR
Pause-DR
Exit1-DR
Exit2-DR
Shift-DR
0x7
0x6
0x2
0x1
0x3
0x0
0x5
tms=0
tms=0
tms=1
tms=0
tms=1
tms=1
tms=0
tms=0
tms=0
tms=1
tms=1
tms=0
tms=1
tms=1
Select-IR-Scan
Capture-IR
Update-IR
Pause-IR
tms=0
Exit1-IR
Exit2-IR
Shift-IR
0xD
0x4
0xE
0xA
0x9
0xB
0x8
tms=0
tms=0
tms=1
tms=0
tms=1
tms=1
Debug in Depth
tms=0
tms=0
tms=1
tms=1
B-5