ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 189

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ATmega88PA Automotive

Manufacturer Part Number
ATmega88PA Automotive
Description
Manufacturer
Atmel Corporation
20.7.5
20.7.6
20.7.7
9223B–AVR–09/11
Parity Checker
Disabling the Receiver
Flushing the Receive Buffer
The Parity Checker is active when the high USART Parity mode (UPMn1) bit is set. Type of
Parity Check to be performed (odd or even) is selected by the UPMn0 bit. When enabled, the
Parity Checker calculates the parity of the data bits in incoming frames and compares the
result with the parity bit from the serial frame. The result of the check is stored in the receive
buffer together with the received data and stop bits. The Parity Error (UPEn) Flag can then be
read by software to check if the frame had a Parity Error.
The UPEn bit is set if the next character that can be read from the receive buffer had a Parity
Error when received and the Parity Checking was enabled at that point (UPMn1 = 1). This bit
is valid until the receive buffer (UDRn) is read.
In contrast to the Transmitter, disabling of the Receiver will be immediate. Data from ongoing
receptions will therefore be lost. When disabled (i.e., the RXENn is set to zero) the Receiver
will no longer override the normal function of the RxDn port pin. The Receiver buffer FIFO will
be flushed when the Receiver is disabled. Remaining data in the buffer will be lost
The receiver buffer FIFO will be flushed when the Receiver is disabled, i.e., the buffer will be
emptied of its contents. Unread data will be lost. If the buffer has to be flushed during normal
operation, due to for instance an error condition, read the UDRn I/O location until the RXCn
Flag is cleared. The following code example shows how to flush the receive buffer.
Assembly Code Example
C Code Example
Note:
Atmel ATmega48PA/88PA/168PA [Preliminary]
USART_Flush:
void USART_Flush( void )
{
}
in r16, UCSRnA
sbrs r16, RXCn
ret
in
rjmp USART_Flush
unsigned char dummy;
while ( UCSRnA & (1<<RXCn) ) dummy = UDRn;
1. See
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and
“SBI” instructions must be replaced with instructions that allow access to extended I/O.
Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
r16, UDRn
Section 6. “About Code Examples” on page 7
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