ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 360

• Manufacturer Part Number: ATmega88PA Automotive
• Manufacturer: Atmel Corporation

31. Register Summary (Continued)
360
Notes:
Address
(0xA4)
(0xA3)
(0xA2)
(0xA1)
(0xA0)
(0x9E)
(0x9D)
(0x9C)
(0x9B)
(0x9A)
(0x8E)
(0x8D)
(0x8C)
(0x8B)
(0x7E)
(0x7D)
(0x7C)
(0x7B)
(0x7A)
(0x9F)
(0x99)
(0x98)
(0x97)
(0x96)
(0x95)
(0x94)
(0x93)
(0x92)
(0x91)
(0x90)
(0x8F)
(0x89)
(0x88)
(0x87)
(0x86)
(0x85)
(0x84)
(0x83)
(0x82)
(0x81)
(0x80)
(0x7F)
(0x79)
(0x78)
(0x77)
(0x8A)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
5. Only valid for the Atmel ATmega88A/88PA/168A/168PA/328/328P.
6. BODS and BODSE only available for picoPower devices ATmega48PA/88PA/168PA
Atmel ATmega48PA/88PA/168PA [Preliminary]
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags.
The CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel
ATmega48PA/88PA/168PA is a complex microcontroller with more peripheral units than can be supported within the 64
location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only
the ST/STS/STD and LD/LDS/LDD instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
OCR1BH
OCR1AH
ADCSRB
ADCSRA
OCR1BL
OCR1AL
TCNT1H
TCCR1C
TCCR1B
TCCR1A
TCNT1L
Name
ADMUX
ICR1H
DIDR1
DIDR0
ICR1L
ADCH
ADCL
COM1A1
FOC1A
REFS1
Bit 7
ICNC1
ADEN
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
COM1A0
FOC1B
REFS0
Bit 6
ICES1
ACME
ADSC
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
COM1B1
ADC5D
ADLAR
ADATE
Bit 5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Timer/Counter1 - Output Compare Register B High Byte
Timer/Counter1 - Output Compare Register A High Byte
Timer/Counter1 - Output Compare Register B Low Byte
Timer/Counter1 - Output Compare Register A Low Byte
Timer/Counter1 - Input Capture Register High Byte
Timer/Counter1 - Input Capture Register Low Byte
Timer/Counter1 - Counter Register High Byte
Timer/Counter1 - Counter Register Low Byte
ADC Data Register High byte
ADC Data Register Low byte
COM1B0
WGM13
ADC4D
Bit 4
ADIF
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
WGM12
ADC3D
Bit 3
MUX3
ADIE
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
ADC2D
ADTS2
ADPS2
Bit 2
MUX2
CS12
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
WGM11
ADC1D
ADTS1
ADPS1
AIN1D
Bit 1
MUX1
CS11
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
WGM10
ADC0D
ADTS0
ADPS0
Bit 0
AIN0D
MUX0
CS10
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
9223B–AVR–09/11
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