ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 68

• Manufacturer Part Number: ATmega88PA Automotive
• Manufacturer: Atmel Corporation

13. External Interrupts
13.1
68
Pin Change Interrupt Timing
Atmel ATmega48PA/88PA/168PA [Preliminary]
The External Interrupts are triggered by the INT0 and INT1 pins or any of the PCINT23...0
pins. Observe that, if enabled, the interrupts will trigger even if the INT0 and INT1 or
PCINT23...0 pins are configured as outputs. This feature provides a way of generating a soft-
ware interrupt. The pin change interrupt PCI2 will trigger if any enabled PCINT[23:16] pin
toggles. The pin change interrupt PCI1 will trigger if any enabled PCINT[14:8] pin toggles. The
pin change interrupt PCI0 will trigger if any enabled PCINT[7:0] pin toggles. The PCMSK2,
PCMSK1 and PCMSK0 Registers control which pins contribute to the pin change interrupts.
Pin change interrupts on PCINT23...0 are detected asynchronously. This implies that these
interrupts can be used for waking the part also from sleep modes other than Idle mode.
The INT0 and INT1 interrupts can be triggered by a falling or rising edge or a low level. This is
set up as indicated in the specification for the External Interrupt Control Register A – EICRA.
When the INT0 or INT1 interrupts are enabled and are configured as level triggered, the inter-
rupts will trigger as long as the pin is held low. Note that recognition of falling or rising edge
interrupts on INT0 or INT1 requires the presence of an I/O clock, described in
and their Distribution” on page
nously. This implies that this interrupt can be used for waking the part also from sleep modes
other than Idle mode. The I/O clock is halted in all sleep modes except Idle mode.
Note:
An example of timing of a pin change interrupt is shown in
Figure 13-1. Timing of pin change interrupts
Note that if a level triggered interrupt is used for wake-up from Power-down, the required level
must be held long enough for the MCU to complete the wake-up to trigger the level interrupt. If
the level disappears before the end of the Start-up Time, the MCU will still wake up, but no inter-
rupt will be generated. The start-up time is defined by the SUT and CKSEL Fuses as described
in
“System Clock and Clock Options” on page
pcint_setflag
pcint_in_(0)
PCINT(0)
pcint_syn
pin_sync
pin_lat
PCINT(0)
PCIF
clk
clk
LE
D
pin_lat
26. Low level interrupt on INT0 and INT1 is detected asynchro-
Q
pin_sync
PCINT(0) in PCMSK(x)
pcint_in_(0)
26.
0
x
clk
Figure
pcint_syn
13-1.
pcint_setflag
“Clock Systems
PCIF
9223B–AVR–09/11