LPC1820FET100 NXP Semiconductors, LPC1820FET100 Datasheet - Page 22

• Manufacturer Part Number: LPC1820FET100
• Description: The LPC1820FET100 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 168 kB of SRAM, and advanced peripherals including High Speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
P3_7
P3_8
P4_0
P4_1
Pin description
C11
C10
D5
A1
x
x
x
x
…continued
D7
E7
-
-
176 123 86
1
179 124 87
3
All information provided in this document is subject to legal disclaimers.
1
3
Rev. 3.1 — 15 December 2011
-
-
[3]
[3]
[3]
[6]
I; PU -
I; PU -
I; PU I/O GPIO2[0] — General purpose digital input/output pin.
I; PU I/O GPIO2[1] — General purpose digital input/output pin.
-
I/O SSP0_MISO — Master In Slave Out for SSP0.
I/O SPIFI_MOSI — Input 0 in SPIFI quad mode; SPIFI
I/O GPIO5[10] — General purpose digital input/output
I/O SSP0_MOSI — Master Out Slave in for SSP0.
-
-
-
I/O SSP0_MOSI — Master Out Slave in for SSP0.
I/O SPIFI_CS — SPIFI serial flash chip select.
I/O GPIO5[11] — General purpose digital input/output
I/O SSP0_SSEL — Slave Select for SSP0.
-
-
O
I
-
-
O
I/O U3_UCLK — Serial clock input/output for USART3 in
-
O
O
-
-
O
O
I
I
Description
R — Function reserved.
R — Function reserved.
output IO0.
pin.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
pin.
R — Function reserved.
R — Function reserved.
MCOA0 — Motor control PWM channel 0, output A.
NMI — External interrupt input to NMI.
R — Function reserved.
R — Function reserved.
LCD_VD13 — LCD data.
synchronous mode.
R — Function reserved.
CTOUT_1 — SCT output 1. Match output 1 of
timer 0.
LCD_VD0 — LCD data.
R — Function reserved.
R — Function reserved.
LCD_VD19 — LCD data.
U3_TXD — Transmitter output for USART3.
ENET_COL — Ethernet Collision detect (MII
interface).
ADC0_1 — ADC0, input channel 1.
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
© NXP B.V. 2011. All rights reserved.
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