LPC1820FET100 NXP Semiconductors, LPC1820FET100 Datasheet - Page 97

• Manufacturer Part Number: LPC1820FET100
• Description: The LPC1820FET100 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 168 kB of SRAM, and advanced peripherals including High Speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 8.
T
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] To V
[11] The values specified are simulated and absolute values.
[12] The weak pull-up resistor is connected to the V
[13] The input cell disables the weak pull-up resistor when the applied input voltage exceeds V
[14] The parameter value specified is a simulated value excluding bond capacitance.
[15] For USB operation 3.0 V  V
[16] Includes external resistors of 33   1 % on D+ and D.
LPC1850_30_20_10
Preliminary data sheet
Symbol
V
USB1 pins (USB1_DP/USB1_DM)
I
V
V
V
V
V
V
C
Z
OZ
amb
DRV
i(dif)
BUS
DI
CM
th(rs)se
OL
OH
trans
Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages.
V
PLL1 disabled. Normal power mode.
PLL1 enabled. Normal power mode.
On pin VBAT; T
V
V
V
Allowed as long as the current limit does not exceed the maximum current allowed by the device.
=
DD(REG)(3V3)
ps
DDA(3V3)
DD(IO)

corresponds to the output of the power switch (see
40
SS
.
supply voltage must be present.

Static characteristics
C to +85
= 3.3 V; T
= V
Parameter
differential input voltage
OFF-state output
current
bus supply voltage
differential input
sensitivity voltage
differential common
mode voltage range
single-ended receiver
switching threshold
voltage
LOW-level output
voltage for
low-/full-speed
HIGH-level output
voltage (driven) for
low-/full-speed
transceiver capacitance pin to GND
driver output
impedance for driver
which is not high-speed
capable
amb
DD(IO)

= 25 C. V
amb
C, unless otherwise specified. Applies to parts LPC1850/30/20/10 Rev ‘A’ only.
= V
= 25 C.
DDA(3V3)
DD((IO)
DD(REG)(3V3)
= 3.3 V; T
…continued
[15]
 3.6 V. Guaranteed by design.
not present.
All information provided in this document is subject to legal disclaimers.
Conditions
0 V < V
(D+)  (D)
includes V
R
R
with 33  series resistor;
steady state drive
amb
L
L
DD(IO)
of 1.5 k to 3.6 V
of 15 k to GND
= 25 C for all power consumption measurements.
Rev. 3.1 — 15 December 2011
I
rail and pulls up the I/O pin to the V
< 3.3 V
Figure
DI
range
11) which is determined by the greater of V
[15]
[16]
32-bit ARM Cortex-M3 microcontroller
Min
100
-
-
0.2
0.8
0.8
-
2.8
-
36
LPC1850/30/20/10
DD(IO)
DD(IO)
level.
.
Typ
400
-
-
-
-
-
-
-
-
-
[1]
BAT
and V
© NXP B.V. 2011. All rights reserved.
Max
1100
10
5.25
-
2.5
2.0
0.18
3.5
20
44.1
DD(Reg)(3V3)
97 of 157
.
Unit
mV
A
V
V
V
V
V
V
pF
