LPC1820FET100 NXP Semiconductors, LPC1820FET100 Datasheet - Page 59

The LPC1820FET100 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 168 kB of SRAM, and advanced peripherals including High Speed USB 2

LPC1820FET100

Manufacturer Part Number
LPC1820FET100
Description
The LPC1820FET100 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 168 kB of SRAM, and advanced peripherals including High Speed USB 2
Manufacturer
NXP Semiconductors
Datasheet

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Part Number:
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NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
PF_5
PF_6
PF_7
Pin description
E9
E7
B7
-
-
-
…continued
-
-
-
190 -
192 -
193 -
All information provided in this document is subject to legal disclaimers.
Rev. 3.1 — 15 December 2011
-
-
-
[6]
[6]
[6]
I; PU -
I; PU -
I; PU -
I/O U3_UCLK — Serial clock input/output for USART3 in
I/O SSP1_SSEL — Slave Select for SSP1.
O
I/O GPIO7[19] — General purpose digital input/output
-
-
-
I
I/O U3_DIR — RS-485/EIA-485 output enable/direction
I/O SSP1_MISO — Master In Slave Out for SSP1.
O
I/O GPIO7[20] — General purpose digital input/output
-
-
I/O I2S1_TX_SDA — I
I
I/O U3_BAUD — Baud pin USART3.
I/O SSP1_MOSI — Master Out Slave in for SSP1.
O
I/O GPIO7[21] — General purpose digital input/output
-
-
I/O I2S1_TX_WS — Transmit Word Select. It is driven by
I/O ADC1_7 — ADC1, input channel 7 or band gap
Description
R — Function reserved.
synchronous mode.
TRACEDATA[0] — Trace data, bit 0.
pin.
R — Function reserved.
R — Function reserved.
R — Function reserved.
ADC1_4 — ADC1, input channel 4.
R — Function reserved.
control for USART3.
TRACEDATA[1] — Trace data, bit 1.
pin.
R — Function reserved.
R — Function reserved.
the transmitter and read by the receiver. Corresponds
to the signal SD in the I
ADC1_3 — ADC1, input channel 3.
R — Function reserved.
TRACEDATA[2] — Trace data, bit 2.
pin.
R — Function reserved.
R — Function reserved.
the master and received by the slave. Corresponds
to the signal WS in the I
output.
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
2
S1 transmit data. It is driven by
2
2
S-bus specification.
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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