EVX8AQ160TPY ETC-unknow, EVX8AQ160TPY Datasheet - Page 54

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EVX8AQ160TPY

Manufacturer Part Number
EVX8AQ160TPY
Description
Adc Quad 1.25gsps 8-bit Lvds 380-pin Ebga
Manufacturer
ETC-unknow
Datasheet
Table 8-7.
Note:
54
Description
Label
Four-channel mode
1.25 Gsps max. per channel
Two-channel mode (channel A and channel C)2.5
Gsps max. per channel
Two-channel mode (channel B and channel C)2.5
Gsps max. per channel
Two-channel mode (channel A and channel D)2.5
Gsps max. per channel
Two-channel mode (channel B and channel D)2.5
Gsps max. per channel
One-channel mode (channel A, 5 Gsps max)
One-channel mode (channel B, 5 Gsps)
One-channel mode (channel C, 5 Gsps)
One-channel mode (channel D, 5 Gsps)
Simultaneous sampling (channel A)
Simultaneous sampling (channel B)
Simultaneous sampling (channel C)
Simultaneous sampling (channel D)
No standby (except if ADCMODE = 11XX)
Standby channel A, channel B
Standby channel C, channel D
Full Standby
1:2 DMUX mode
1:1 DMUX mode
Binary coding
Gray coding
EV8AQ160
When bit3 bit2 = 11, the external clock signal and analog input signal are applied internally to the four ADC cores. The value of
bit1 bit0 gives the channel on which the analog input should be applied.
0846G–BDC–11/09
Control Register Settings (Address 0x01): Bit7 to Bit0
(Note:)
(Note:)
(Note:)
(Note:)
X
Bit 7
B/G
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
Bit 6
DMUX
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
Bit 5
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
X
X
X
X
STDBY <1:0>
Bit 4
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
0
1
X
X
X
X
Bit 3
0
0
0
0
0
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
Bit 2
0
1
1
1
1
0
0
0
0
1
1
1
1
X
X
X
X
X
X
X
X
ADCMODE <3:0>
e2v semiconductors SAS 2009
Bit 1
X
0
0
1
1
0
0
1
1
0
0
1
1
X
X
X
X
X
X
X
X
Bit 0
X
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X

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