EVX8AQ160TPY ETC-unknow, EVX8AQ160TPY Datasheet - Page 9

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EVX8AQ160TPY

Manufacturer Part Number
EVX8AQ160TPY
Description
Adc Quad 1.25gsps 8-bit Lvds 380-pin Ebga
Manufacturer
ETC-unknow
Datasheet
Table 5-1.
e2v semiconductors SAS 2009
Parameter
Clock Inputs
Source type
Clock input common mode voltage
(note: the clock should be AC coupled) for
information only
Clock input power level (low phase noise
sinewave input)100Ω differential, AC
coupled signal
Clock input swing (differential voltage)
on each clock input
Clock input capacitance (die + package)
Clock input resistance (differential)
Clock jitter (max. allowed on clock source)
For 1 GHz sinewave analog input
Clock duty cycle requirement in
one-channel mode for performance
Clock duty cycle requirement in
two-channel mode for performance
Clock duty cycle requirement in
four-channel mode for performance
SYNC, SYNCN Inputs
Logic compatibility
Input voltages to be applied
50Ω transmission lines
Logic Low
Logic High
Swing (each single-ended output)
Common Mode
SYNC, SYNCN input capacitance
SYNC, SYNCN Input resistance
SPI
CMOS low level input voltage
CMOS high level input voltage
CMOS low level of Schmitt trigger
CMOS high level of Schmitt trigger
CMOS Schmitt trigger hysteresis
CMOS low level output voltage (Iolc = 2 or
3 mA)
Electrical Characteristics (Continued)
Symbol
V
P
V
V
C
R
Jitter
Duty
cycle
Duty
cycle
Duty
cycle
V
V
V
V
CSYNC
RSYNC
V
V
Vtminusc
Vtplusc
Vhystc
Volc
CM
CLK
CLK
CLKN
CLK
CLK
IL
IH
IH
ICM
ilc
ihc
-V
,
IL
Level
Test
1,4
1,4
1,4
5
4
4
5
4
4
4
4
4
5
4
4
4
4
4
Min
–9
150
150
48
40
40
1.4
90
0
0.75 × V
0.65 × V
0.15 × V
85
Differential Sinewave
CC
CC
CC
Typ
1.8
0
450
450
0.5
113
50
50
50
330
1.2
0.5
100
LVDS
Max
4
565
565
115
500
52
60
60
1.1
110
0.25 × V
V
0.35 × V
0.4
CC
CC
CC
0846G–BDC–11/09
EV8AQ160
Unit
V
dBm
mVpp
mVpp
pF
Ω
fs
%
%
%
V
V
mV
V
pF
Ω
V
V
V
V
V
V
Notes
(3)
(3)
(3)(4)
(3)(4)
(5)(6)
(5)(6)
9

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