HT46RU67 Holtek Semiconductor Inc., HT46RU67 Datasheet - Page 14

• Manufacturer Part Number: HT46RU67
• Description: Ht46ru67/ht46cu67 -- A/d Type 8-bit Mcu With Lcd
• Manufacturer: Holtek Semiconductor Inc.

that is caused by a complete reception or transmission
of 8-bits of data from or to the serial interface. After the
interrupt is enabled, and the stack is not full and the SIF
bit is set, a subroutine call to location 08H or 14H, cho-
sen via configuration options, will occur. The related in-
terrupt request flag, SIF, will be reset and the EMI bit is
cleared to disable further maskable interrupt.
During the execution of an interrupt subroutine, other
maskable interrupt acknowledgments are all held until
the RETI instruction is executed or the EMI bit and the
related interrupt control bit are set both to 1, if the stack
is not full. To return from the interrupt subroutine, a
the EMI bit and enables an interrupt service, but RET
does not.
Interrupts occurring in the interval between the rising
edges of two consecutive T2 pulses are serviced on the
latter of the two T2 pulses if the corresponding interrupts
are enabled. In the case of simultaneous requests, the
priorities in the following table apply. These can be
masked by resetting the EMI bit.
The EMI, EEI0, EEI1, ET0I, ET1I, EURI, EADI, ESII and
EMFI bits are used to control the enabling/disabling of in-
terrupts. These bits prevent the requested interrupt from
being serviced. Once the interrupt request flags, EIF0,
EIF1, T0F, T1F, URF, ADF, ESII, MFF, are set, they will re-
main in the INTC0 and INTC1 registers until the interrupts
are serviced or cleared by a software instruction.
The Timer/Event Counter 2 overflow interrupt flag, T2F;
Note:
Rev. 1.00
RET or RETI instruction may be executed. RETI sets
External Interrupt 0 or A/D Interrupt -
Selected Via Configuration Option
External Interrupt 1 or
Serial Interface Interrupt
Timer/Event Counter 0 Overflow
Timer/Event Counter 1 Overflow
UART Bus Interrupt or
Serial Interface Interrupt
Multi-function Interrupt
(Timer/Event Counter 2 / Real Time
Clock/Time Base Overflow)
32768Hz crystal enable condition: For WDT clock source or for system clock source.
The external resistor and capacitor components connected to the 32768Hz crystal are not necessary to pro-
vide oscillation. For applications where precise RTC frequencies are essential, these components may be re-
quired to provide frequency compensation due to different crystal manufacturing tolerances.
Interrupt Source
Priority Vector
1
2
3
4
5
6
0CH
04H
08H
10H
14H
18H
System Oscillator
14
bit 4 of the MFIC register, the real time clock interrupt
flag, RTF; bit 6 of the MFIC register, the time base inter-
rupt flag, TBF; bit 5 of the MFIC register, indicate that a
related interrupt has occurred. As these flags will not be
cleared automatically, they should be cleared by the
user. The enable control Timer 2 interrupt, ET2I, the en-
able time base interrupt, ETBI, the enable real time
clock interrupt, ERTI, constitute the Interrupt Control
Register 2, MFIC, which is located at 2FH in the Pro-
gram Memory.
It is recommended that a program does not use the
rupts often occur in an unpredictable manner or need to
be serviced immediately in some applications. If only
one stack is left and the interrupt enabling is not well
controlled, the original control sequence may be dam-
aged if a CALL is executed.
Oscillator Configuration
The device provides three oscillator circuits for system
clocks. These are an RC oscillator, a crystal oscillator
and a 32768Hz crystal oscillator, the choice of which is
determined by a configuration option. The Power Down
mode will stop the system oscillator, if it is an RC or crys-
tal oscillator type and will ignore external signals in order
to conserve power. If the 32768Hz crystal oscillator is
selected as the system oscillator, it will continue to run in
the Power Down mode, but the instruction execution will
be stopped. Since the 32768Hz oscillator is also de-
signed for timing purposes, the internal timing (RTC,
time base, WDT) operation still runs even if the system
enters the Power Down mode.
Of the three oscillators, if the RC oscillator is used, an
external resistor between OSC1 and VSS is required,
whose range should be within 24k
tem clock frequency divided by 4, can be monitored on
pin OSC2 if a pull-high resistor is added. This can be
used to synchronise external logic. The RC oscillator
provides the most cost effective solution. However, the
frequency of the oscillation may vary with VDD, temper-
ature, and the chip itself due to process variations. It is
therefore, not suitable for timing sensitive operations
where accurate an oscillator frequency is desired.
CALL instruction within the interrupt subroutine. Inter-
HT46RU67/HT46CU67
February 27, 2008
to 1M . The sys-