HT46RU67 Holtek Semiconductor Inc., HT46RU67 Datasheet - Page 9

• Manufacturer Part Number: HT46RU67
• Description: Ht46ru67/ht46cu67 -- A/d Type 8-bit Mcu With Lcd
• Manufacturer: Holtek Semiconductor Inc.

microcontroller manages program control by loading the
required address into the Program Counter. For condi-
tional skip instructions, once the condition has been
met, the next instruction, which has already been
fetched during the present instruction execution, is dis-
carded and a dummy cycle takes its place while the cor-
rect instruction is obtained.
The lower byte of the Program Counter, known as the
Program Counter Low register or PCL, is available for
program control and is a readable and writable register.
By transferring data directly into this register, a short pro-
gram jump can be executed directly, however, as only
this low byte is available for manipulation, the jumps are
limited to the present page of memory, that is 256 loca-
tions. When such program jumps are executed it should
also be noted that a dummy cycle will be inserted.
As the Program Memory is stored in two Banks, the Bank
selection is under the control of bit 5 of the Bank Pointer.
It is this Bank Pointer bit that controls the highest address
bit of the Program Counter as shown in the diagram.
Program Memory
The program memory is used to store the program in-
structions, which are to be executed. It also contains
data, table, and interrupt entries, and is organized into a
format of 32768 16 bits, which are addressed by the PC
and table pointer. The Program Memory is divided into
two banks, Bank0 and Bank1. Each bank has a capacity
of 8192 16 bits and is selected using bits BP.5 and PB.6
in the the bank pointer register. With BP = 000XXXXXB,
Bank 0 is selected and with BP = 001XXXXXB, Bank 1 is
selected, Bank 2 is selected and with BP = 010xxxxxB;
Bank 3 is selected and with BP = 011xxxxxB. The JMP
and CALL instructions provide only 13 bits of address to
allow branching within any 8K program memory bank.
When executing a JMP or CALL instruction, the user
must ensure that the bank pointer bit, BP.5, BP.6 is pro-
grammed so that the desired program memory bank is
addressed. If a return from a CALL instruction or inter-
rupt is executed, the entire 14 bit PC is popped off the
stack. Therefore, manipulation of the BP.5 is not re-
quired when the RET or RETI instructions are executed.
Note:
Rev. 1.00
TABRDC [m]
TABRDL [m]
Instruction(s)
*14~*0: Table location bits
@7~@0: Table pointer lower-order bits (TBLP)
1111111
*14~*8
TBHP
@7
@7
*7
@6
@6
*6
Table Location
@5
@5
*5
9
Table Location
Certain locations in the Program Memory are reserved
for special usage:
TBHP: Table pointer higher-order bits
Location 000H
Location 000H is reserved for program initialisation.
After a device reset, the program will jump to this loca-
tion and begin execution.
Location 004H
Location 004H is reserved for the external interrupt or
the A/D converter interrupt, selected via configuration
option. If the INT0 input pin is activated or if an A/D
conversion has completed, the interrupt is enabled,
and the stack is not full, the program begins execution
at location 004H.
Location 008H
Location 008H is also reserved for the external inter-
rupt service program or serial interface interrupt, se-
lected via configuration option. If the INT1 input pin is
activated, or 8-bit data have been received/transmit-
ted successful from serial interface, the interrupt is en-
abled, and the stack is not full, the program will jump
to this location and begin execution.
Location 00CH
Location 00CH is reserved for the Timer/Event Coun-
ter 0 interrupt service program. If a timer interrupt re-
sults from a Timer/Event Counter 0 overflow, and if the
interrupt is enabled and the stack is not full, the pro-
gram will jump to this location and begin execution.
@4
@4
*4
@3
@3
*3
Program Memory
HT46RU67/HT46CU67
@2
@2
*2
February 27, 2008
@1
@1
*1
@0
@0
*0