S5D2650 Samsung Semiconductor, Inc., S5D2650 Datasheet - Page 8

• Manufacturer Part Number: S5D2650
• Description: Multistandard Video Decoder/scaler
• Manufacturer: Samsung Semiconductor, Inc.

S5D2650 Data Sheet
1. FUNCTIONAL DESCRIPTION
1.1. VIDEO INPUT
The S5D2650 supports complete video decoding of many analog video standards. In addition, the chip can support
direct 8-bit YCbCr input for high quality video scaling and other processing.
1.1.1. Analog Video Input
Figure 1 shows the detailed block diagram of the analog front end. Up to four composite video sources, two
S-video sources, two 3-wire YPbPr component video source, or any combination can be selected. The allowed
inputs are selected using the INSEL[2:0] bits in the CMDB register. Table 1 lists all possible input selections. The
front end has three paths each containing an analog gain control, a clamping control, and an 8-bit ADC. Composite
video input uses only the luma path. The ADC digital data is used to calculate the correct gain and clamp values.
The data is feedback to the analog clamping and gain control. This architecture eliminates any offset and gain
mismatch in the analog front end.
The analog inputs must be AC coupled through an external 0.1 mF capacitor clamp. Due to the high sampling rate
of the ADC’s inside the S5D2650, most video sources will not require a low-pass filter for alias reduction. For those
video sources with harmonics above 13 MHz, a simple single order pole at 6 MHz will provide sufficient high
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PAGE 8 OF 95
7/18/03