ADC12030CIWM National Semiconductor, ADC12030CIWM Datasheet

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ADC12030CIWM

Manufacturer Part Number
ADC12030CIWM
Description
Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold
Manufacturer
National Semiconductor
Datasheet

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© 1999 National Semiconductor Corporation
ADC12H030/ADC12H032/ADC12H034/ADC12H038,
ADC12030/ADC12032/ADC12034/ADC12038
Self-Calibrating 12-Bit Plus Sign Serial I/O A/D
Converters with MUX and Sample/Hold
General Description
The ADC12030, and ADC12H030 families are 12-bit plus
sign successive approximation A/D converters with serial I/O
and configurable input multiplexers. The ADC12032/
ADC12H032, ADC12034/ADC12H034 and ADC12038/
ADC12H038 have 2, 4 and 8 channel multiplexers, respec-
tively. The differential multiplexer outputs and A/D inputs are
available on the MUXOUT1, MUXOUT2, A/DIN1 and A/DIN2
pins. The ADC12030/ADC12H030 has a two channel multi-
plexer with the multiplexer outputs and A/D inputs internally
connected. The ADC12030 family is tested with a 5 MHz
clock, while the ADC12H030 family is tested with an 8 MHz
clock. On request, these A/Ds go through a self calibration
process that adjusts linearity, zero and full-scale errors to
less than
The analog inputs can be configured to operate in various
combinations
pseudo-differential modes. A fully differential unipolar analog
input range (0V to +5V) can be accommodated with a single
+5V supply. In the differential modes, valid outputs are ob-
tained even when the negative inputs are greater than the
positive because of the 12-bit plus sign output data format.
The
NSC MICROWIRE
LM4040 or LM4041.
TRI-STATE
COPS
serial
microcontrollers, HPC
®
is a registered trademark of National Semiconductor Corporation.
±
1 LSB each.
I/O
of
is
. For voltage references see the
and MICROWIRE
configured
single-ended,
are trademarks of National Semiconductor Corporation.
to
DS011354
comply
differential,
with
the
or
Features
n Serial I/O (MICROWIRE Compatible)
n 2, 4, or 8 channel differential or single-ended multiplexer
n Analog input sample/hold function
n Power down mode
n Variable resolution and conversion rate
n Programmable acquisition time
n Variable digital output word length and format
n No zero or full scale adjustment required
n Fully tested and guaranteed with a 4.096V reference
n 0V to 5V analog input range with single 5V power
n No Missing Codes over temperature
Key Specifications
n Resolution
n 12-bit plus sign conversion time
n 12-bit plus sign throughput time
n Integral linearity error
n Single supply
n Power dissipation
Applications
n Medical instruments
n Process control systems
n Test equipment
supply
— ADC12H030 family
— ADC12030 family
— ADC12H030 family
— ADC12030 family
— Power down
12-bit plus sign
±
33 mW (max)
www.national.com
100 µW (typ)
5.5 µs (max)
8.8 µs (max)
8.6 µs (max)
1 LSB (max)
14 µs (max)
July 1999
5V
±
10%

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ADC12030CIWM Summary of contents

Page 1

... I/O is configured to comply NSC MICROWIRE ™ . For voltage references see the LM4040 or LM4041. TRI-STATE ® registered trademark of National Semiconductor Corporation. COPS ™ microcontrollers, HPC ™ and MICROWIRE ™ are trademarks of National Semiconductor Corporation. © 1999 National Semiconductor Corporation DS011354 Features n Serial I/O (MICROWIRE Compatible) ...

Page 2

ADC12038 Simplified Block Diagram Connection Diagrams 16-Pin Wide Body SO Packages DS011354-6 Top View www.national.com 20-Pin Wide Body SO Packages Top View 2 DS011354-1 DS011354-7 ...

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... Connection Diagrams (Continued) 24-Pin Wide Body SO Packages DS011354-8 Top View Ordering Information Industrial Temperature Range ADC12H030CIWM, ADC12030CIWM ADC12H032CIWM, ADC12032CIWM ADC12H034CIN, ADC12034CIN ADC12H034CIWM, ADC12034CIWM ADC12H038CIWM, ADC12038CIWM Pin Descriptions CCLK The clock applied to this input controls the sucessive approximation conversion time interval and the acquisition time. The rise and fall times of the clock edges should not exceed 1 µ ...

Page 4

Pin Descriptions (Continued) exception of the first bit of data. When CS is low continously, the first bit of the data is clocked out on the rising edge of EOC (end of conversion). When CS is toggled the fall- ing ...

Page 5

... Resolution with No Missing Codes +INL Positive Integral Linearity Error −INL Negative Integral Linearity Error DNL Differential Non-Linearity Positive Full-Scale Error Negative Full-Scale Error Operating Ratings (Notes 1, 2) Operating Temperature Range ADC12030CIWM, ADC12H030CIWM, ADC12032CIWM, ADC12H032CIWM, 6.5V ADC12034CIN, ADC12034CIWM, ADC12H034CIN, + −0. +0.3V ADC12H034CIWM, ADC12038CIWM, + ...

Page 6

Converter Electrical Characteristics + The following specifications apply for MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, f sion mode ADC12030, ADC12032, ADC12034 and ADC12038, R input with fixed 2.048V common-mode voltage, ...

Page 7

Converter Electrical Characteristics + The following specifications apply for MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, f sion mode ADC12030, ADC12032, ADC12034 and ADC12038, R input with fixed 2.048V common-mode voltage, ...

Page 8

DC and Logic Electrical Characteristics + The following specifications apply for MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, f sion mode ADC12030, ADC12032, ADC12034 and ADC12038, R input with fixed 2.048V ...

Page 9

AC Electrical Characteristics + = V The following specifications apply for ns MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, f sion mode MHz for ...

Page 10

... Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T allowable power dissipation at any temperature is P max = 150˚C. The typical thermal resistance ( ADC12H030CIWM, ADC12030CIWM ADC12H032CIWM, ADC12032CIWM ADC12H034CIN, ADC12034CIN ADC12H034CIWM, ADC12034CIWM ADC12H038CIWM, ADC12038CIWM Note 5: The human body model is a 100 pF capacitor discharged through a 1.5 k Note 6: See AN450 “ ...

Page 11

AC Electrical Characteristics Note 9: With the test condition for − V REF REF REF = T = 25˚C and represent most likely parametric norm. Note 10: Typicals are Note 11: Tested limits ...

Page 12

AC Electrical Characteristics FIGURE 3. Simplified Error Curve vs Output Code after Auto-Calibration Cycle Typical Performance Characteristics auto-calibration unless otherwise specified. The performance for 8-bit + sign mode is equal to or better than shown. (Note 9) Linearity Error Change ...

Page 13

Typical Performance Characteristics auto-calibration unless otherwise specified. The performance for 8-bit + sign mode is equal to or better than shown. (Note 9) (Continued) Linearity Error Change vs Supply Voltage DS011354-56 Full-Scale Error Change vs Reference Voltage DS011354-59 Zero Error ...

Page 14

Typical Performance Characteristics auto-calibration unless otherwise specified. The performance for 8-bit + sign mode is equal to or better than shown. (Note 9) (Continued) Analog Supply Current vs Temperature DS011354-65 Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. ...

Page 15

Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. (Continued) Bipolar Spurious Free Dynamic Range DS011354-74 Unipolar Signal-to-Noise + Distortion Ratio vs Input Signal Level DS011354-77 Unipolar Spectral Response with 20 kHz Sine Wave Input DS011354-80 The following curves ...

Page 16

Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. (Continued) Unipolar Spectral Response with 50 kHz Sine Wave Input DS011354-83 Test Circuits DO “TRI-STATE” Timing Diagrams DO Falling and Rising Edge www.national.com The following curves ...

Page 17

Timing Diagrams (Continued) DO Data Output Timing with CS Continuously Low DI Data Input Timing DS011354-20 DO Data Output Timing Using CS 17 DS011354-21 DS011354-22 www.national.com ...

Page 18

Timing Diagrams (Continued) Note: DO output data is not valid during this cycle. ADC12038 Read Data without Starting a Conversion Using CS www.national.com ADC12038 Auto Cal or Auto Zero 18 DS011354-23 DS011354-24 ...

Page 19

Timing Diagrams (Continued) ADC12038 Read Data without Starting a Conversion with CS Continuously Low ADC12038 Conversion Using CS with 8-Bit Digital Output Format 19 DS011354-25 DS011354-26 www.national.com ...

Page 20

Timing Diagrams (Continued) ADC12038 Conversion Using CS with 16-Bit Digital Output Format ADC12038 Conversion with CS Continuously Low and 8-Bit Digital Output Format www.national.com 20 DS011354-51 DS011354-28 ...

Page 21

Timing Diagrams (Continued) ADC12038 Conversion with CS Continuously Low and 16-Bit Digital Output Format ADC12038 Software Power Up/Down Using CS with 16-Bit Digital Output Format 21 DS011354-29 DS011354-52 www.national.com ...

Page 22

Timing Diagrams (Continued) ADC12038 Software Power Up/Down with CS Continuously Low and 16-Bit Digital Output Format Note: Hardware power up/down may occur at any time high while a conversion is in progress that conversion will be corrupted ...

Page 23

Timing Diagrams (Continued) ADC12038 Configuration Modification — Example of a Status Read Note: In order for all 9 bits of Status Information to be accessible, the last conversion programmed before Cycle N needs to have a resolution of 8 bits ...

Page 24

Timing Diagrams (Continued) * Tantalum ** Monolithic Ceramic or better FIGURE 6. Recommended Power Supply Bypassing and Grounding Tables DO Formats DB0 DB1 DB2 DB3 with Sign Bits MSB 13 Sign MSB 10 9 First ...

Page 25

Tables (Continued) DO Formats DB0 DB1 DB2 DB3 without Sign Bits MSB 12 MSB First Bits 8 MSB Bits 16 LSB Bits LSB 12 LSB 1 ...

Page 26

Tables (Continued) Analog Channel Addressed MUX and Assignment Address with A/DIN1 tied to MUXOUT1 and A/DIN2 tied to MUXOUT2 DI0 DI1 DI2 CH0 CH1 CH2 − − ...

Page 27

Tables (Continued) TABLE 5. Mode Programming (Continued) ADC12038 DI0 DI1 DI2 DI3 ADC12034 DI0 DI1 DI2 ADC12030 and DI0 DI1 ADC12032 ...

Page 28

Tables (Continued) Status Bit DB0 DB1 Location Status Bit PU PD Device Status “High” “High” “High” indicates indicates indicates a Power a Power an Up Down Auto-Cal Sequence Sequence Sequence Function progress progress progress ...

Page 29

Application Hints (Continued) 1.3 CS Low Continuously Considerations When CS is continuously low important to transmit the exact number of SCLK pulses that the ADC expects. Not do- ing so will desynchronize the serial communications to the ADC. ...

Page 30

Application Hints (Continued) 1.6 User Mode and Test Mode An instruction may be issued to the ADC to put it into test mode. Test mode is used by the manufacturer to verify com- plete functionality of the device. During test ...

Page 31

Application Hints (Continued) Differential Configuration DS011354-40 A/DIN1 and A/DIN2 can be assigned as the + or − input The Multiplexer assignment tables for the ADC12030,2,4,8 ( Tables summarize the aforementioned functions for the different versions of ...

Page 32

Application Hints (Continued) FIGURE 12. Pseudo-Differential Biasing with the Signal Source AC Coupled Directly into the ADC An alternative method for biasing pseudo-differential opera- tion is to use the +2.5V from the LM4040 to bias any ampli- fier circuits driving ...

Page 33

Application Hints (Continued) FIGURE 14. Pseudo-Differential Biasing without the Loss of Digital Output Range 3.0 REFERENCE VOLTAGE The difference in the voltages applied to the V − V defines the analog input span (the difference between REF the voltage applied ...

Page 34

Application Hints (Continued) * Tantalum FIGURE 16. Low Drift Extremely Stable Reference Circuit The ADC 12030/2/4/8 can be used in either ratiometric or ab- solute reference applications. In ratiometric systems, the analog input voltage is proportional to the voltage used ...

Page 35

Application Hints (Continued) MUXOUT2 tied to A/DIN2 the internal multiplexer switch on resistance is typically 1 The A/DIN1 and A/DIN2 mux on resistance is typically 750 . 6.0 INPUT SOURCE RESISTANCE < For low impedance voltage sources ( ...

Page 36

Application Hints (Continued) 11.0 CLOCK SIGNAL LINE ISOLATION The ADC12030/2/4/8’s performance is optimized by routing the analog input/output and reference signal conductors as far as possible from the conductors that carry the clock sig- nals to the CCLK and SCLK ...

Page 37

Application Hints (Continued) 15.0 AN RS232 SERIAL INTERFACE Shown on the following page is a schematic for an RS232 in- terface to any IBM and compatible PCs. The DTR, RTS, and CTS RS232 signal lines are buffered via level translators ...

Page 38

Application Hints (Continued) DOL = Data Out word length Data string for A/D DI input, ’variables DO = A/D result string ’ ’SET CS# HIGH OUT <&amp>H3FC, (<&amp>H2 OR INP (<&amp>H3FC)) OUT <&amp>H3FC, (<&amp>HFE AND INP(<&amp>H3FC)) OUT <&amp>H3FC, ...

Page 39

... Physical Dimensions inches (millimeters) unless otherwise noted Order Number ADC12030CIWM or ADC12H030CIWM Order Number ADC12032CIWM or ADC12H032CIWM NS Package Number M16B NS Package Number M20B 39 www.national.com ...

Page 40

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Order Number ADC12034CIWM or ADC12H034CIWM Order Number ADC12038CIWM or ADC12H038CIWM www.national.com NS Package Number M24B NS Package Number M28B 40 ...

Page 41

... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...

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