ADC12030CIWM National Semiconductor, ADC12030CIWM Datasheet - Page 31

• Manufacturer Part Number: ADC12030CIWM
• Description: Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold
• Manufacturer: National Semiconductor

Application Hints
A/DIN1 and A/DIN2 can be assigned as the + or − input
The Multiplexer assignment tables for the ADC12030,2,4,8
( Tables 2, 3, 4 ) summarize the aforementioned functions for
the different versions of A/Ds.
2.1 Biasing for Various Multiplexer Configurations
Figure 11 is an example of biasing the device for
single-ended operation. The sign bit is always low. The digi-
tal output range is 0 0000 0000 0000 to 0 1111 1111 1111.
One LSB is equal to 1 mV (4.1V/4096 LSBs).
For pseudo-differential signed operation, the biasing circuit
shown in Figure 12 shows a signal AC coupled to the ADC.
This gives a digital output range of −4096 to +4095. With a
2.5V reference, as shown, 1 LSB is equal to 610 µV. Al-
though, the ADC is not production tested with a 2.5V refer-
ence, linearity error typically will not change more than 0.1
LSB (see the curves in the Typical Electrical Characteristics
Section). With the ADC set to an acquisition time of 10 clock
Configuration
Differential
(Continued)
DS011354-40
FIGURE 11. Single-Ended Biasing
FIGURE 10.
A/DIN1 is + input
A/DIN2 is − input
31
periods, the input biasing resistor needs to be 600
Notice though that the input coupling capacitor needs to be
made fairly large to bring down the high pass corner. In-
creasing the acquisition time to 34 clock periods (with a
5 MHz CCLK frequency) would allow the 600 to increase to
6k, which with a 1 µF coupling capacitor would set the high
pass corner at 26 Hz. Increasing R, to 6k would allow R
be 2k.
Configuration
Single-Ended
DS011354-41
DS011354-46
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or less.
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