ADC12030CIWM National Semiconductor, ADC12030CIWM Datasheet - Page 10

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ADC12030CIWM

Manufacturer Part Number
ADC12030CIWM
Description
Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold
Manufacturer
National Semiconductor
Datasheet

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t
t
t
t
C
C
Symbol
RDO
FDO
CD
SD
The following specifications apply for V
sion mode, t
MHz for the ADC12030, ADC12032, ADC12034 and ADC12038, R
fully-differential input with fixed 2.048V common-mode voltage, and 10(t
face limits apply for T
IN
OUT
AC Electrical Characteristics
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-
tional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed speci-
fications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: When the input voltage (V
The 120 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 30 mA to four.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
T
Note 5: The human body model is a 100 pF capacitor discharged through a 1.5 k
Note 6: See AN450 “Surface Mounting Methods and Their Effect on Product Reliability” or the section titled “Surface Mount” found in any post 1986 National Semi-
conductor Linear Data Book for other methods of soldering surface mount devices.
Note 7: Two on-chip diodes are tied to each analog input through a series resistor as shown below. Input voltage magnitude up to 5V above V
will not damage this device. However, errors in the A/D conversion can occur (if these diodes are forward biased by more than 50 mV) if the input voltage magnitude
of selected or unselected analog input go above V
V
Note 8: To guarantee accuracy, it is required that the V
pin.
J
DC
max = 150˚C. The typical thermal resistance (
to ensure accurate conversions.
DO Rise Time, TRI-STATE to High
DO Rise Time, Low to High
DO Fall Time, TRI-STATE to Low
DO Fall Time, High to Low
Delay from CS Falling Edge
to DOR Falling Edge
Delay from Serial Data Clock Falling
Edge to DOR Rising Edge
Capacitance of Logic Inputs
Capacitance of Logic Outputs
r
= t
f
= 3 ns, f
A
= T
Parameter
CK
IN
J
) at any pin exceeds the power supplies (V
= f
= T
SK
ADC12H030CIWM, ADC12030CIWM
ADC12H032CIWM, ADC12032CIWM
ADC12H034CIN, ADC12034CIN
ADC12H034CIWM, ADC12034CIWM
ADC12H038CIWM, ADC12038CIWM
MIN
= 8 MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, f
to T
+
JA
A
D
= V
+ or below GND by more than 50 mV. As an example, if V
) of these parts when board mounted follow:
= (T
MAX
A
A
J
+ and V
+ = V
max − T
; all other limits T
Part Number
(Continued)
D
D
A
+ be connected together to the same power supply with separate bypass capacitors at each V
+ = +5.0 V
)/
R
R
JA
L
L
or the number given in the Absolute Maximum Ratings, whichever is lower. For this device,
= 3k, C
= 3k, C
Conditions
IN
10
DC
A
<
L
L
= T
, V
GND or V
S
resistor into each pin.
= 100 pF
= 100 pF
REF
= 25 , source impedance for V
J
= 25˚C. (Note 17)
CK
+ = +4.096 V
) acquisition time unless otherwise specified. Bold-
IN
>
DS011354-2
V
A
Resistance
+ or V
Thermal
J
70˚C/W
64˚C/W
42˚C/W
57˚C/W
50˚C/W
max,
(Note 10)
D
JA
Typical
DC
+), the current at that pin should be limited to 30 mA.
A
+ is 4.5 V
JA
10
10
12
12
25
25
10
20
, V
and the ambient temperature, T
REF
− = 0 V
DC
, full-scale input voltage must be 4.55
REF
(Note 11)
DC
Limits
+ and V
, 12-bit + sign conver-
30
30
30
30
45
45
A
REF
+ or 5V below GND
CK
A
. The maximum
= f
SK
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
(Limits)
25 ,
Units
= 5
pF
pF
+

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