PIC12CE67 Microchip Technology, PIC12CE67 Datasheet - Page 11

• Manufacturer Part Number: PIC12CE67
• Description: 8-Pin/ 8-Bit CMOS Microcontroller with A/D Converter and EEPROM Data Memory
• Manufacturer: Microchip Technology

4.0
4.1
The PIC12CE67X has a 13-bit program counter capa-
ble of addressing an 8K x 14 program memory space.
For the PIC12CE673 the first 1K x 14 (0000h-03FFh) is
implemented.
For the PIC12CE674, the first 2K x 14 (0000h-07FFh)
is implemented. Accessing a location above the physi-
cally implemented address will cause a wraparound.
The reset vector is at 0000h and the interrupt vector is
at 0004h.
FIGURE 4-1:
1998 Microchip Technology Inc.
CALL, RETURN
RETFIE, RETLW
MEMORY ORGANIZATION
Program Memory Organization
Peripheral
(PIC12CE674 only)
On-chip Program
PIC12CE67X PROGRAM
MEMORY MAP AND STACK
Stack Level 1
Stack Level 8
Reset Vector
Memory
PC<12:0>
Interrupt Vector
13
03FFh
0400h
0000h
0004h
0005h
07FFh
0800h
1FFFh
Preliminary
4.2
The data memory is partitioned into two Banks which
contain the General Purpose Registers and the Special
Function Registers. Bit RP0 is the bank select bit.
RP0 (STATUS<5>) = 1
RP0 (STATUS<5>) = 0
Each Bank extends up to 7Fh (128 bytes). The lower
locations of each Bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are General Purpose Registers implemented as
static RAM. Both Bank 0 and Bank 1 contain special
function registers. Some "high use" special function
registers from Bank 0 are mirrored in Bank 1 for code
reduction and quicker access.
Also note that F0h through FFh on the PIC12CE67X is
mapped into Bank 0 registers 70h-7Fh as common
RAM.
4.2.1
The register file can be accessed either directly, or indi-
rectly
(Section 4.5).
through
Data Memory Organization
GENERAL PURPOSE REGISTER FILE
the
PIC12CE67X
File
Bank 1
Bank 0
Select
DS40181B-page 11
Register
FSR