PIC12CE67 Microchip Technology, PIC12CE67 Datasheet - Page 14

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PIC12CE67

Manufacturer Part Number
PIC12CE67
Description
8-Pin/ 8-Bit CMOS Microcontroller with A/D Converter and EEPROM Data Memory
Manufacturer
Microchip Technology
Datasheet

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PIC12CE67X
TABLE 4-1:
DS40181B-page 14
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0', r = reserved.
Note 1: These registers can be addressed from either bank.
Address Name
Bank 1
(1)
(1)
(1)
(1)
(1,2)
(1)
2: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
3: Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.
4: The IRP and RP1 bits are reserved on the PIC12CE67X, always maintain these bits clear.
INDF
OPTION
PCL
STATUS
FSR
TRIS
PCLATH
INTCON
PIE1
PCON
OSCCAL
ADCON1
Shaded locations are unimplemented, read as ‘0’.
contents are transferred to the upper byte of the program counter.
Addressing this location uses contents of FSR to address data memory (not a physical register)
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
PIC12CE67X SPECIAL FUNCTION REGISTER SUMMARY (CONT.)
GPPU
IRP
CAL5
Bit 7
GIE
(4)
INTEDG
RP1
CAL4
PEIE
ADIE
Bit 6
(4)
GPIO Data Direction Register
T0CS
CAL3
Bit 5
T0IE
RP0
Write Buffer for the upper 5 bits of the PC
T0SE
CAL2
Bit 4
INTE
TO
Preliminary
GPIE
CAL1
Bit 3
PSA
PD
PCFG2
CAL0
Bit 2
T0IF
PS2
Z
PCFG1
Bit 1
INTF
POR
PS1
DC
PCFG0
GPIF
Bit 0
PS0
C
1998 Microchip Technology Inc.
0000 0000
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
0011 1111
---0 0000
0000 000x
-0-- ----
---- --0-
1000 00--
---- -000
Power-on
Value on
Reset
0000 0000
1111 1111
0000 0000
000q quuu
uuuu uuuu
0011 1111
---0 0000
0000 000u
-0-- ----
---- --u-
uuuu uu--
---- -000
Resets
Value on
all other
(3)

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