PIC17C42 Microchip Technology, PIC17C42 Datasheet - Page 34

• Manufacturer Part Number: PIC17C42
• Description: High-Performance 8-Bit CMOS EPROM/ROM Microcontroller
• Manufacturer: Microchip Technology

PIC17C4X
TABLE 6-3:
DS30412C-page 34
Address
Bank 0
Bank 1
Legend:
Note 1:
Unbanked
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
10h
11h
12h
13h
16h
17h
14h
15h
2:
3:
4:
5:
(1)
(2)
Name
INDF0
FSR0
PCL
PCLATH
ALUSTA
T0STA
CPUSTA
INTSTA
INDF1
FSR1
WREG
TMR0L
TMR0H
TBLPTRL
TBLPTRH
BSR
PORTA
DDRB
PORTB
RCSTA
RCREG
TXSTA
TXREG
SPBRG
DDRC
PORTC
DDRD
PORTD
DDRE
PORTE
PIR
PIE
x = unknown, u = unchanged, - = unimplemented read as '0', q - value depends on condition. Shaded cells are unimplemented, read as '0'.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for PC<15:8> whose contents are updated
from or transferred to the upper byte of the program counter.
The TO and PD status bits in CPUSTA are not affected by a MCLR reset.
Other (non power-up) resets include: external reset through MCLR and the Watchdog Timer Reset.
The following values are for both TBLPTRL and TBLPTRH:
All PIC17C4X devices (Power-on Reset 0000 0000) and (All other resets 0000 0000)
except the PIC17C42 (Power-on Reset xxxx xxxx) and (All other resets uuuu uuuu)
The PRODL and PRODH registers are not implemented on the PIC17C42.
SPECIAL FUNCTION REGISTERS
Uses contents of FSR0 to address data memory (not a physical register)
Indirect data memory address pointer 0
Low order 8-bits of PC
Holding register for upper 8-bits of PC
Uses contents of FSR1 to address data memory (not a physical register)
Indirect data memory address pointer 1
Working register
TMR0 register; low byte
TMR0 register; high byte
Low byte of program memory table pointer
High byte of program memory table pointer
Bank select register
Data direction register for PORTB
PORTB data latch
Serial port receive register
Serial port transmit register
Baud rate generator register
Data direction register for PORTC
Data direction register for PORTD
Data direction register for PORTE
INTEDG
RBPU
CSRC
SPEN
AD15
PEIF
RC7/
RD7/
RBIF
RBIE
Bit 7
AD7
FS3
—
—
TMR3IE
T0CKIF
TMR3IF
T0SE
AD14
RC6/
RD6/
Bit 6
RX9
AD6
FS2
TX9
—
—
—
TMR2IE
TMR2IF
STKAV
SREN
TXEN
T0CS
AD13
RC5/
RD5/
Bit 5
T0IF
RA5
AD5
FS1
—
GLINTD
TMR1IF
TMR1IE
CREN
SYNC
AD12
Bit 4
INTF
RC4/
RD4/
FS0
PS3
RA4
AD4
—
CA2IE
CA2IF
AD11
RC3/
RD3/
Bit 3
PEIE
RA3
AD3
PS2
OV
TO
—
—
—
RE2/WR
T0CKIE
CA1IE
FERR
CA1IF
AD10
RC2/
RD2/
Bit 2
PS1
RA2
AD2
PD
—
Z
RA1/T0CKI
RE1/OE
OERR
TRMT
RC1/
RD1/
Bit 1
T0IE
TXIF
TXIE
AD1
AD9
PS0
DC
—
RE0/ALE
RA0/INT
RX9D
TX9D
RC0/
RCIE
Bit 0
INTE
RD0/
RCIF
AD0
AD8
1996 Microchip Technology Inc.
—
—
C
---- ----
xxxx xxxx
0000 0000
0000 0000
1111 xxxx
0000 000-
--11 11--
0000 0000
---- ----
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
0000 0000
0-xx xxxx
1111 1111
xxxx xxxx
0000 -00x
xxxx xxxx
0000 --1x
xxxx xxxx
xxxx xxxx
1111 1111
xxxx xxxx
1111 1111
xxxx xxxx
---- -111
---- -xxx
0000 0010
0000 0000
Power-on
Value on
Reset
(4)
(4)
Value on all
---- ----
uuuu uuuu
0000 0000
uuuu uuuu
1111 uuuu
0000 000-
--11 qq--
0000 0000
---- ----
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
0-uu uuuu
1111 1111
uuuu uuuu
0000 -00u
uuuu uuuu
0000 --1u
uuuu uuuu
uuuu uuuu
1111 1111
uuuu uuuu
1111 1111
---- -uuu
0000 0010
0000 0000
uuuu uuuu
---- -111
resets (3)
other
(4)
(4)