PIC17C42 Microchip Technology, PIC17C42 Datasheet - Page 38

• Manufacturer Part Number: PIC17C42
• Description: High-Performance 8-Bit CMOS EPROM/ROM Microcontroller
• Manufacturer: Microchip Technology

PIC17C4X
6.2.2.3
This register contains various control bits. Bit7
(INTEDG) is used to control the edge upon which a sig-
nal on the RA0/INT pin will set the RB0/INT interrupt
flag. The other bits configure the Timer0 prescaler and
clock source. (Figure 11-1).
FIGURE 6-9:
DS30412C-page 38
bit7
bit 7:
bit 6:
bit 5:
bit 4-1: PS3:PS0: Timer0 Prescale Selection bits
bit 0:
INTEDG
R/W - 0
TMR0 STATUS/CONTROL REGISTER
(T0STA)
INTEDG: RA0/INT Pin Interrupt Edge Select bit
This bit selects the edge upon which the interrupt is detected.
1 = Rising edge of RA0/INT pin generates interrupt
0 = Falling edge of RA0/INT pin generates interrupt
T0SE: Timer0 Clock Input Edge Select bit
This bit selects the edge upon which TMR0 will increment.
When T0CS = 0
1 = Rising edge of RA1/T0CKI pin increments TMR0 and/or generates a T0CKIF interrupt
0 = Falling edge of RA1/T0CKI pin increments TMR0 and/or generates a T0CKIF interrupt
When T0CS = 1
Don’t care
T0CS: Timer0 Clock Source Select bit
This bit selects the clock source for Timer0.
1 = Internal instruction clock cycle (T
0 = T0CKI pin
These bits select the prescale value for Timer0.
Unimplemented: Read as '0'
PS3:PS0
R/W - 0
T0SE
0000
0001
0010
0011
0100
0101
0110
0111
1xxx
T0STA REGISTER (ADDRESS: 05h, UNBANKED)
R/W - 0
T0CS
Prescale Value
1:128
1:256
1:16
1:32
1:64
R/W - 0
1:1
1:2
1:4
1:8
PS3
R/W - 0
PS2
CY
)
R/W - 0
PS1
R/W - 0
PS0
U - 0
—
bit0
R = Readable bit
W = Writable bit
U = Unimplemented,
-n = Value at POR reset
1996 Microchip Technology Inc.
reads as ‘0’