XC3S250E Xilinx, Inc., XC3S250E Datasheet - Page 124

• Manufacturer Part Number: XC3S250E
• Description: Spartan-3E FPGA Family
• Manufacturer: Xilinx, Inc.

Package Overview
Table 2
package styles for the Spartan-3E family. Each package
style is available as a standard and an environmen-
tally-friendly lead-free (Pb-free) option. The Pb-free pack-
ages include an extra ‘G’ in the package style name. For
example, the standard "VQ100" package becomes
"VQG100" when ordered as the Pb-free option. The
Table 2: Spartan-3E Family Package Options
Selecting the Right Package Option
Spartan-3 FPGAs are available in both quad-flat pack
(QFP) and ball grid array (BGA) packaging options. While
QFP packaging offers the lowest absolute cost, the BGA
Table 3: QFP and BGA Comparison
DS312-4 (v1.1) March 21, 2005
Advance Product Specification
Maximum User I/O
Packing Density (Logic/Area)
Signal Integrity
Simultaneous Switching Output (SSO) Support
Thermal Dissipation
Minimum Printed Circuit Board (PCB) Layers
Hand Assembly/Rework
VQ100 / VQG100
PQ208 / PQG208
CP132 / CPG132
TQ144 / TQG144
FG320 / FGG320
FG400 / FGG400
FG484 / FGG484
FT256 / FTG256
Package
shows the eight low-cost, space-saving production
R
Characteristic
Leads
100
132
144
208
256
320
400
484
Very-thin Quad Flat Pack (VQFP)
Chip-Scale Package (CSP)
Thin Quad Flat Pack (TQFP)
Plastic Quad Flat Pack (PQFP)
Fine-pitch, Thin Ball Grid Array (FBGA)
Fine-pitch Ball Grid Array (FBGA)
Fine-pitch Ball Grid Array (FBGA)
Fine-pitch Ball Grid Array (FBGA)
Type
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Quad Flat Pack (QFP)
mechanical dimensions of the standard and Pb-free pack-
ages are similar, as shown in the mechanical drawings pro-
vided in
Not all Spartan-3E densities are available in all packages.
For a specific package, however, there is a common foot-
print that supports all the devices available in that package.
See the footprint diagrams that follow.
packages are superior in almost every other aspect, as
summarized in
using BGA packaging whenever possible.
Possible
Limited
Table
Good
158
Fair
Fair
4
Maximum
4.
108
158
190
250
304
376
I/O
66
92
Table
3. Consequently, Xilinx recommends
Pitch
(mm)
0.5
0.5
0.5
0.5
1.0
1.0
1.0
1.0
Ball Grid Array (BGA)
Area (mm)
30.6 x 30.6
Pinout Descriptions
16 x 16
22 x 22
17 x 17
19 x 19
21 x 21
23 x 23
8 x 8
Difficult
Better
Better
Better
Better
376
6
Height
(mm)
1.20
1.10
4.10
1.60
1.55
2.00
2.60
2.60
3