XC3S250E Xilinx, Inc., XC3S250E Datasheet - Page 181

• Manufacturer Part Number: XC3S250E
• Description: Spartan-3E FPGA Family
• Manufacturer: Xilinx, Inc.

Pinout Descriptions
60
FG400 Footprint
Left Half of Package
(top view)
156
62
46
24
16
42
24
16
2
4
8
0
I/O: Unrestricted,
general-purpose user I/O
INPUT: User I/O or
reference resistor input for
bank
DUAL: Configuration pin,
then possible user I/O
VREF: User I/O or input
voltage reference for bank
GCLK: User I/O, input, or
clock buffer input
CONFIG: Dedicated
configuration pins
JTAG: Dedicated JTAG
port pins
GND: Ground
VCCO: Output voltage
supply for bank
VCCINT: Internal core
supply voltage (+1.2V)
VCCAUX: Auxiliary supply
voltage (+2.5V)
N.C.: Not connected
Figure 9: FG400 Package Footprint (top view)
W
A
B
C
D
G
H
K
M
N
R
U
E
F
J
L
P
T
V
Y
LHCLK5
LHCLK4
VREF_3
L03N_3
L04N_3
L06N_3
INPUT
INPUT
L12N_3
L16N_3
L24N_3
L28N_3
L30N_3
INPUT
L03P_3
L04P_3
L16P_3
TRDY2
L21P_3
L24P_3
L28P_3
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
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PROG_B
VCCO_3
VCCO_3
VCCO_3
LHCLK1
L30N_0
L30P_0
L01N_3
L06P_3
L09P_3
L12P_3
L14N_3
INPUT
L21N_3
L26P_3
L26N_3
L30P_3
INPUT
L02P_2
INPUT
L02N_2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
2
VREF_3
VREF_3
LHCLK0
LHCLK7
LHCLK6
VREF_2
INPUT
INPUT
L01P_3
L02N_3
L05N_3
L07P_3
L09N_3
L11P_3
L14P_3
L17N_3
L17P_3
L23P_3
L27P_3
L29N_3
L29P_3
GND
GND
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
3
VCCAUX
VCCO_0
VCCO_3
VCCO_3
HSWAP
INPUT
L28N_0
L31P_0
L31N_0
L02P_3
L05P_3
L07N_3
L11N_3
L19N_3
L23N_3
L27N_3
INPUT
L01P_2
L01N_2
L04P_2
L04N_2
CSO_B
INIT_B
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
4
VCCO_2
VREF_0
VREF_3
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
L28P_0
L26N_0
L29N_0
L29P_0
L08N_3
L08P_3
L19P_3
L25P_3
L25N_3
L06P_2
L03P_2
L03N_2
DOUT
CSI_B
BUSY
MOSI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
5
Bank 0
Bank 2
VCCO_3
VREF_3
VREF_3
L24N_0
L27N_0
INPUT
INPUT
L13N_3
INPUT
L06N_2
INPUT
INPUT
INPUT
INPUT
L26P_0
L27P_0
L25N_0
L10P_3
L13P_3
L20P_3
L20N_3
L05P_2
L05N_2
L08P_2
L08N_2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
6
Advance Product Specification
VCCAUX
VCCO_0
VREF_0
LHCLK2
LHCLK3
VREF_2
L24P_0
INPUT
L25P_0
L23N_0
L10N_3
L15P_3
L15N_3
L18N_3
L22P_3
L22N_3
L09N_2
L09P_2
L07N_2
L07P_2
IRDY2
GND
GND
DS312-4 (v1.1) March 21, 2005
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
7
VCCINT
VCCINT
VCCO_2
VREF_0
L21N_0
INPUT
L22N_0
INPUT
L22P_0
L23P_0
INPUT
L19P_0
INPUT
L18P_3
INPUT
L11N_2
INPUT
L11P_2
L10N_2
L10P_2
L13N_2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
8
VCCINT
VCCINT
VCCINT
VCCAUX
GCLK11
GCLK12
L17N_0
L20N_0
L18N_0
INPUT
L19N_0
INPUT
L12N_2
L21P_0
L20P_0
L18P_0
L14P_2
L12P_2
L15P_2
L13P_2
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D7
9
DS312-4_08_031105
VCCINT
VCCINT
VCCINT
VCCAUX
GCLK10
VCCO_0
VCCO_0
GC
GCLK14
GCLK13
VREF_2
L17P_0
L15N_0
INPUT
L16N_0
INPUT
L16P_0
L16N_2
L16P_2
INPUT
L14N_2
L18P_2
L15N_2
GCLK7
GCLK9
GCLK8
GCLK2
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
10
I/O
D3
D4
D2
D6
LK15
R