MT312 Zarlink Semiconductor, MT312 Datasheet - Page 14

• Manufacturer Part Number: MT312
• Description: Satellite Channel Decoder
• Manufacturer: Zarlink Semiconductor

2.4.2
The frame alignment algorithm detects a sequence of correctly spaced synchronising bytes in the Viterbi decoded
bit-stream and arranges the input into blocks of data bytes. Each block consists of 204 bytes for DVB and 147 bytes
for DSS. In the DSS mode, the synchronising byte is removed from the data stream, so only 146 bytes of a block
are passed to the next stage. The frame alignment block also removes the 180° phase ambiguity not removed by
the Viterbi decoder.
2.4.3
2.4.3.1
Before transmission, the data bytes are interleaved with each other in a cyclic pattern of twelve. This ensures the
bytes are spaced out to avoid the possibility of a noise spike corrupting a group of consecutive message bytes.
Figure 6 below shows conceptually how the convolutional de-interleaving system works. The synchronisation byte
is always loaded into the First-In-First-Out (FIFO) memory in branch 0. The switch is operated at regular byte
intervals to insert successively received bytes into successive branches. After 12 bytes have been received,
byte 13 is written next to the synchronisation byte in branch 0, etc. In the MT312, this de-interleaving function is
realised using on-chip Random Access Memory (RAM).
2.4.3.2
Before transmission, the data bytes are interleaved with each other in a cyclic pattern of thirteen. This ensures the
bytes are spaced out to avoid the possibility of a noise spike corrupting a group of consecutive message bytes.
Figure 7 below shows conceptually how the convolutional de-interleaving system works. On the MT312, this
function is realised in the same Random Access Memory (RAM) as used for DVB, but utilising a different
addressing algorithm.
The frame alignment block
The De-interleaver block
DVB
DSS
VITERBI
Coarse
Count
Error
Bit
Status
0
0
Figure 5 - Viterbi error count coarse indication
Zarlink Semiconductor Inc.
MT312
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VIT_MAXERR[7:0]
Data Bits
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