MT312 Zarlink Semiconductor, MT312 Datasheet - Page 61

• Manufacturer Part Number: MT312
• Description: Satellite Channel Decoder
• Manufacturer: Zarlink Semiconductor

10.4
The number of PLL clocks per Byte clock is:
Where:
e.g. For DVB ASTRA
The transport Stream clock rate
The time to transmit a packet
Time to output 188 bytes
The gap between packets
The gap as number of byte clocks
N =
Q*R*P
Data output timing
2*V
Q = 1 for QPSK, 2 for BPSK
R = 204/193 for DVB, 147/135 for DSS
P = 8 for parallel byte output, 1 for serial byte output
V = Viterbi code rate, e.g. 3/4 for typical ASTRA signals
PLL = Sampling frequency MHz
RS = symbol rate in MS/s, e.g. 27.5MS/s for typical ASTRA signals
*
PLL
RS
truncated to an integer
N
N
= 1 * 204/193 * 8/2 * 4/3 *90E6/27.5E6
= PLL/N
= 188/5E6
= 3.9564E-5 - 3.76E-5
= 1.936E-6 * 5E6
= 18
= 90E6/18
= 5E6Hz
= 204 * 8/2 * 4/3 *1/RS
= 1088/RS
= 3.9564E-5 sec
= 3.76E-5 sec
= 1.936E-6 sec
= 9.82
Zarlink Semiconductor Inc.
MT312
61
Design Manual